Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-23 Thread Jan Beulich
On 23.01.2020 16:43, Roger Pau Monné wrote: > On Fri, Jan 17, 2020 at 05:25:12PM +0100, Jan Beulich wrote: >> On 17.01.2020 17:08, Roger Pau Monné wrote: >>> On Fri, Jan 17, 2020 at 04:56:00PM +0100, Jan Beulich wrote: On 17.01.2020 16:09, Roger Pau Monne wrote: > The Intel SDM states:

Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-23 Thread Roger Pau Monné
On Fri, Jan 17, 2020 at 05:25:12PM +0100, Jan Beulich wrote: > On 17.01.2020 17:08, Roger Pau Monné wrote: > > On Fri, Jan 17, 2020 at 04:56:00PM +0100, Jan Beulich wrote: > >> On 17.01.2020 16:09, Roger Pau Monne wrote: > >>> The Intel SDM states: > >>> > >>> "When an illegal vector value (0 to

Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-17 Thread Jan Beulich
On 17.01.2020 17:08, Roger Pau Monné wrote: > On Fri, Jan 17, 2020 at 04:56:00PM +0100, Jan Beulich wrote: >> On 17.01.2020 16:09, Roger Pau Monne wrote: >>> The Intel SDM states: >>> >>> "When an illegal vector value (0 to 15) is written to a LVT entry and >>> the delivery mode is Fixed (bits

Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-17 Thread Roger Pau Monné
On Fri, Jan 17, 2020 at 03:30:44PM +, Andrew Cooper wrote: > On 17/01/2020 15:09, Roger Pau Monne wrote: > > The Intel SDM states: > > > > "When an illegal vector value (0 to 15) is written to a LVT entry and > > the delivery mode is Fixed (bits 8-11 equal 0), the APIC may signal an > >

Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-17 Thread Roger Pau Monné
On Fri, Jan 17, 2020 at 04:56:00PM +0100, Jan Beulich wrote: > On 17.01.2020 16:09, Roger Pau Monne wrote: > > The Intel SDM states: > > > > "When an illegal vector value (0 to 15) is written to a LVT entry and > > the delivery mode is Fixed (bits 8-11 equal 0), the APIC may signal an > > illegal

Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-17 Thread Jan Beulich
On 17.01.2020 16:09, Roger Pau Monne wrote: > The Intel SDM states: > > "When an illegal vector value (0 to 15) is written to a LVT entry and > the delivery mode is Fixed (bits 8-11 equal 0), the APIC may signal an > illegal vector error, without regard to whether the mask bit is set or > whether

Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC

2020-01-17 Thread Andrew Cooper
On 17/01/2020 15:09, Roger Pau Monne wrote: > The Intel SDM states: > > "When an illegal vector value (0 to 15) is written to a LVT entry and > the delivery mode is Fixed (bits 8-11 equal 0), the APIC may signal an > illegal vector error, without regard to whether the mask bit is set or > whether