On Wed, May 16, 2018 at 07:51:07AM -0600, Jan Beulich wrote:
> >>> On 16.05.18 at 15:41, wrote:
> > On Wed, May 16, 2018 at 06:01:00AM -0600, Jan Beulich wrote:
> >> @@ -729,6 +729,14 @@ static int hvm_load_mtrr_msr(struct doma
> >> if ( hvm_load_entry(MTRR, h, _mtrr)
>>> On 16.05.18 at 15:41, wrote:
> On Wed, May 16, 2018 at 06:01:00AM -0600, Jan Beulich wrote:
>> --- unstable.orig/xen/arch/x86/hvm/mtrr.c
>> +++ unstable/xen/arch/x86/hvm/mtrr.c
>> @@ -676,22 +676,22 @@ int hvm_set_mem_pinned_cacheattr(struct
>>
>> static int
On Wed, May 16, 2018 at 06:01:00AM -0600, Jan Beulich wrote:
> >>> On 16.05.18 at 13:53, wrote:
> > On Wed, May 16, 2018 at 02:39:26AM -0600, Jan Beulich wrote:
> >> >>> On 15.05.18 at 16:36, wrote:
> >> > +for ( i = 0; i < num_var_ranges; i++
>>> On 16.05.18 at 13:53, wrote:
> On Wed, May 16, 2018 at 02:39:26AM -0600, Jan Beulich wrote:
>> >>> On 15.05.18 at 16:36, wrote:
>> > +for ( i = 0; i < num_var_ranges; i++ )
>>
>> Following your v1 I had already put together a patch to
On Wed, May 16, 2018 at 02:39:26AM -0600, Jan Beulich wrote:
> >>> On 15.05.18 at 16:36, wrote:
> > +for ( i = 0; i < num_var_ranges; i++ )
>
> Following your v1 I had already put together a patch to change just the
> save and load functions here, as the adjustments
>>> On 15.05.18 at 16:36, wrote:
> --- a/xen/arch/x86/hvm/mtrr.c
> +++ b/xen/arch/x86/hvm/mtrr.c
> @@ -154,14 +154,26 @@ uint8_t pat_type_2_pte_flags(uint8_t pat_type)
> int hvm_vcpu_cacheattr_init(struct vcpu *v)
> {
> struct mtrr_state *m = >arch.hvm_vcpu.mtrr;
> +