>>> On 30.08.18 at 20:09, wrote:
> On Thu, Aug 30, 2018 at 09:49:58AM -0600, Jan Beulich wrote:
>> >>> On 27.08.18 at 18:55, wrote:
>> > --- a/xen/arch/x86/spec_ctrl.c
>> > +++ b/xen/arch/x86/spec_ctrl.c
>> > @@ -20,6 +20,7 @@
>> > #include
>> > #include
>> > #include
>> > +#include
>> >
On Thu, Aug 30, 2018 at 09:49:58AM -0600, Jan Beulich wrote:
> >>> On 27.08.18 at 18:55, wrote:
> > Adds support for modifying the LS_CFG MSR to enable SSBD on supporting
> > AMD CPUs. There needs to be locking logic for family 17h with SMT
> > enabled since both threads share the same MSR.
>>> On 27.08.18 at 18:55, wrote:
> Adds support for modifying the LS_CFG MSR to enable SSBD on supporting
> AMD CPUs. There needs to be locking logic for family 17h with SMT
> enabled since both threads share the same MSR. Otherwise, a core just
> needs to write to the LS_CFG MSR. For more
