flight 183992 libvirt real [real]
flight 183997 libvirt real-retest [real]
http://logs.test-lab.xenproject.org/osstest/logs/183992/
http://logs.test-lab.xenproject.org/osstest/logs/183997/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
> [2.464598] amd_gpio AMDI0030:00: failed to enable wake-up interrupt
Is it expected that IRQ7 goes from fasteoi (kernel 6.6.4 ) to
ioapic-edge and IRQ9 to ioapic-level ?
IR-IO-APIC7-fasteoi pinctrl_amd
IR-IO-APIC9-fasteoi acpi
to (xen 4.18.0)
xen-pirq -ioapic-edge
Pipeline #1096471389 has failed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 948e0330 (
https://gitlab.com/xen-project/xen/-/commit/948e03303138482bf12f67740d8ebd8272824903
)
Commit Message:
Pipeline #1096471389 has failed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 948e0330 (
https://gitlab.com/xen-project/xen/-/commit/948e03303138482bf12f67740d8ebd8272824903
)
Commit Message:
Add the rules accepted in the last three MISRA C working group meetings.
Signed-off-by: Stefano Stabellini
diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
index 75921b9a34..ab89116a43 100644
--- a/docs/misra/rules.rst
+++ b/docs/misra/rules.rst
@@ -462,11 +462,23 @@ maintainers if you
Thank you for your prompt response.
On Tue, Dec 5, 2023 at 11:43 PM Andrew Cooper wrote:
> Who is still in 64-bit mode ?
>
> It is legal for a 64-bit L1 to VMRUN into a 32-bit L2 with PG=0.
>
> But I'm guessing that you mean L2 is also 64-bit, and we're clearing PG,
> thus creating an illegal
On Tue, 5 Dec 2023, Federico Serafini wrote:
> Add missing parameter names to address violations of MISRA C:2012
> Rule 8.2. Furthermore, use C standard types to comply with XEN coding style.
>
> No functional change.
>
> Signed-off-by: Federico Serafini
> ---
> xen/arch/x86/include/asm/acpi.h
On Tue, 5 Dec 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
> ---
> xen/arch/x86/include/asm/mm.h | 20 ++--
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git
On Tue, 5 Dec 2023, Federico Serafini wrote:
> Add missing parameter names to address violations of MISRA C:2012
> Rule 8.2. Furthermore, remove trailing spaces and use C standard types to
> comply with XEN coding style.
>
> No functional change.
>
> Signed-off-by: Federico Serafini
> ---
>
On Tue, 5 Dec 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefano Stabellini
On Tue, 5 Dec 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefano Stabellini
On Tue, 5 Dec 2023, Federico Serafini wrote:
> Add missing parameter names to address violations of MISRA C:2012
> Rule 8.2. Furthermore, use C standard types to comply with XEN coding style.
> No functional change.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefano Stabellini
On 05/12/2023 4:31 pm, Nicola Vetrini wrote:
> The initializer of 'ns16550_com' violates MISRA C Rule 9.3
> because it explicitly initializes only the first element of the array,
> but the semantics is the same if the explicit initialization is
> omitted.
>
> No functional change.
>
>
flight 183998 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183998/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
flight 183993 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183993/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-i386-pvops 6 kernel-build fail REGR. vs. 183973
Tests which did
On Tue, Dec 5, 2023 at 6:12 PM Julien Grall wrote:
>
> From: Julien Grall
>
> Several maintainers have expressed a stronger preference
> to use '-' when in filename and option that contains multiple
> words.
>
> So document it in CODING_STYLE.
>
> Signed-off-by: Julien Grall
>
> ---
>
On Tue, 5 Dec 2023, Roger Pau Monné wrote:
> > > > I don't think we should enable IOREQ servers to handle PCI passthrough
> > > > for PVH guests and/or guests with vPCI. If the domain has vPCI, PCI
> > > > Passthrough can be handled by vPCI just fine. I think this should be a
> > > > good
On Tue, Dec 5, 2023 at 2:07 PM Jan Beulich wrote:
>
> On 05.12.2023 14:46, Luca Fancellu wrote:
> > In my opinion, I don’t know of any tool that can address all the
> > flexibility the Xen codestyle allows, yet the use of automatic
> > checkers would improve the review time, allow more new
On Tue, 5 Dec 2023, Luca Fancellu wrote:
> Hi all,
>
> I’m writing this mail to collect thoughts about the need to improve the SAF-*
> comments.
>
> I think we reached a point where we need to use deviations for some violation
> that we want
> to keep in the code with a proper justification
Pipeline #1096532827 has failed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 01da0aee (
https://gitlab.com/xen-project/xen/-/commit/01da0aeecd41435cea8bd2fe0f547e0a474f6e45
)
Commit Message: ns16550:
On Tue, 5 Dec 2023, Jan Beulich wrote:
> The rule demands that all array elements be initialized (or dedicated
> initializers be used). Introduce a small set of macros to allow doing so
> without unduly affecting use sites (in particular in terms of how many
> elements .matches[] actually has;
Commit 948e03303138 ("automation/alpine: add elfutils-dev") had an unintended
consequence of causing Qemu to gain a runtime dependency on libdw.so
The {adl,zen3p}-pci-hvm-x86-64-gcc-debug tests, which are the only two tests
that run the built Qemu, started failing with:
Error loading shared
On Tue, 5 Dec 2023, Andrew Cooper wrote:
> Commit 948e03303138 ("automation/alpine: add elfutils-dev") had an unintended
> consequence of causing Qemu to gain a runtime dependency on libdw.so
>
> The {adl,zen3p}-pci-hvm-x86-64-gcc-debug tests, which are the only two tests
> that run the built
On Tue, 5 Dec 2023, Stewart Hildebrand wrote:
> On 12/5/23 12:09, Roger Pau Monné wrote:
> > On Tue, Dec 05, 2023 at 11:27:03AM -0500, Stewart Hildebrand wrote:
> >> On 12/5/23 06:08, Roger Pau Monné wrote:
> >>> On Mon, Dec 04, 2023 at 02:07:51PM -0800, Stefano Stabellini wrote:
> On Mon, 4
flight 183999 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183999/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf ef3fde64aa78598a4c21556629936fb228390e8c
baseline version:
ovmf
flight 184000 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/184000/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
Pipeline #1096532827 has passed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 01da0aee (
https://gitlab.com/xen-project/xen/-/commit/01da0aeecd41435cea8bd2fe0f547e0a474f6e45
)
Commit Message: ns16550:
On Tue, 5 Dec 2023, Julien Grall wrote:
> Hi Ayan,
>
> On 05/12/2023 12:50, Ayan Kumar Halder wrote:
> > Hi Julien/All,
> >
> > On 05/12/2023 11:02, Michal Orzel wrote:
> > >
> > > On 05/12/2023 11:42, Julien Grall wrote:
> > > >
> > > > On 05/12/2023 10:30, Michal Orzel wrote:
> > > > >
> >
Pipeline #1096652606 has passed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 4c6142a1 (
https://gitlab.com/xen-project/xen/-/commit/4c6142a1ab004be132f386da3cabce07b44fac2d
)
Commit Message: CI: Fix
Pipeline #1096802796 has failed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 3e5672d6 (
https://gitlab.com/xen-project/xen/-/commit/3e5672d69fe09e240195fa6744686b59db6d7d69
)
Commit Message:
On Tue, Dec 05, 2023 at 08:37:14PM +0800, Yu Kuai wrote:
> From: Yu Kuai
>
> Patch 1 add some bdev apis, then follow up patches will use these apis
> to avoid access bd_inode directly, and hopefully the field bd_inode can
> be removed eventually(after figure out a way for fs/buffer.c).
What
On Tue, Dec 05, 2023 at 08:37:16PM +0800, Yu Kuai wrote:
> diff --git a/drivers/block/xen-blkback/xenbus.c
> b/drivers/block/xen-blkback/xenbus.c
> index e34219ea2b05..e645afa4af57 100644
> --- a/drivers/block/xen-blkback/xenbus.c
> +++ b/drivers/block/xen-blkback/xenbus.c
> @@ -104,8 +104,7 @@
Hi,
在 2023/12/06 13:54, Christoph Hellwig 写道:
On Tue, Dec 05, 2023 at 08:37:14PM +0800, Yu Kuai wrote:
From: Yu Kuai
Patch 1 add some bdev apis, then follow up patches will use these apis
to avoid access bd_inode directly, and hopefully the field bd_inode can
be removed eventually(after
On 2023/12/5 18:32, Jan Beulich wrote:
> On 05.12.2023 10:19, Roger Pau Monné wrote:
>> On Mon, Dec 04, 2023 at 02:19:33PM -0800, Stefano Stabellini wrote:
>>> On Mon, 4 Dec 2023, Roger Pau Monné wrote:
On Fri, Dec 01, 2023 at 07:37:55PM -0800, Stefano Stabellini wrote:
> On Fri, 1 Dec
flight 183996 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183996/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-qemut-win7-amd64 19 guest-stopfail like 183990
test-amd64-i386-xl-qemuu-win7-amd64
> +void invalidate_bdev_range(struct block_device *bdev, pgoff_t start,
> +pgoff_t end)
> +{
> + invalidate_mapping_pages(bdev->bd_inode->i_mapping, start, end);
> +}
> +EXPORT_SYMBOL_GPL(invalidate_bdev_range);
All these could probably use kerneldoc comments.
For
Hi Thomas Gleixner,
On 2023/12/6 01:02, Thomas Gleixner wrote:
> On Mon, Dec 04 2023 at 13:31, Stefano Stabellini wrote:
>> On Mon, 3 Dec 2023, Chen, Jiqian wrote:
> vpci device state when device is reset on dom0 side.
>
> And call that function in pcistub_init_device. Because when
Hi,
在 2023/12/06 14:14, Christoph Hellwig 写道:
+void invalidate_bdev_range(struct block_device *bdev, pgoff_t start,
+ pgoff_t end)
+{
+ invalidate_mapping_pages(bdev->bd_inode->i_mapping, start, end);
+}
+EXPORT_SYMBOL_GPL(invalidate_bdev_range);
All these could
Hi,
在 2023/12/06 13:55, Christoph Hellwig 写道:
On Tue, Dec 05, 2023 at 08:37:16PM +0800, Yu Kuai wrote:
diff --git a/drivers/block/xen-blkback/xenbus.c
b/drivers/block/xen-blkback/xenbus.c
index e34219ea2b05..e645afa4af57 100644
--- a/drivers/block/xen-blkback/xenbus.c
+++
flight 184002 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/184002/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
On 04.12.2023 20:17, Sébastien Chaumat wrote:
> Le lun. 4 déc. 2023 à 10:06, Jan Beulich a écrit :
>
>> On 03.12.2023 10:56, Sébastien Chaumat wrote:
>>> Hello,
>>>
>>> Trying to get the Framework Laptop 13 AMD to work with QubesOS I hit the
>>> following Xen issue :
>>>
>>> Xen version :
On Mon, Dec 04, 2023 at 02:19:33PM -0800, Stefano Stabellini wrote:
> On Mon, 4 Dec 2023, Roger Pau Monné wrote:
> > On Fri, Dec 01, 2023 at 07:37:55PM -0800, Stefano Stabellini wrote:
> > > On Fri, 1 Dec 2023, Roger Pau Monné wrote:
> > > > On Thu, Nov 30, 2023 at 07:15:17PM -0800, Stefano
From: "H. Peter Anvin (Intel)"
Let ret_from_fork_asm() jmp to asm_fred_exit_user when FRED is enabled,
otherwise the existing IDT code is chosen.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/entry/entry_64.S | 6 ++
From: "H. Peter Anvin (Intel)"
Entering a new task is logically speaking a return from a system call
(exec, fork, clone, etc.). As such, if ptrace enables single stepping
a single step exception should be allowed to trigger immediately upon
entering user space. This is not optional.
NMI should
Hi Julien,
Thanks a lot for your review and comment, this is very helpful.
> On 4 Dec 2023, at 20:24, Julien Grall wrote:
>
> Hi Jens,
>
> On 04/12/2023 07:55, Jens Wiklander wrote:
>> When an FF-A enabled guest is destroyed it may leave behind memory
>> shared with SPs. This memory must be
Update the Mini-OS upstream revision.
Signed-off-by: Juergen Gross
---
Config.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Config.mk b/Config.mk
index 594c70d8bb..c184add653 100644
--- a/Config.mk
+++ b/Config.mk
@@ -226,7 +226,7 @@ QEMU_UPSTREAM_URL ?=
In IRQ/NMI induced VM exits, KVM VMX needs to execute the respective
handlers, which requires the software to create a FRED stack frame,
and use it to invoke the handlers. Add fred_irq_entry_from_kvm() for
this job.
Export fred_entry_from_kvm() because VMX can be compiled as a module.
Like #DB, when occurred on different ring level, i.e., from user or kernel
context, #MCE needs to be handled on different stack: User #MCE on current
task stack, while kernel #MCE on a dedicated stack.
This is exactly how FRED event delivery invokes an exception handler: ring
3 event on level 0
FRED defines additional information in the upper 48 bits of cs/ss
fields. Therefore add the information definitions into the pt_regs
structure.
Specially introduce a new structure fred_ss to denote the FRED flags
above SS selector, which avoids FRED_SSX_ macros and makes the code
simpler and
From: "H. Peter Anvin (Intel)"
When using FRED, reserve space at the top of the stack frame, just
like i386 does.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/include/asm/thread_info.h | 12 +---
1 file changed, 9 insertions(+), 3
On 28.11.2023 11:03, Roger Pau Monne wrote:
> Introduce a basic livepatch test using the interface to run self modifying
> tests. The introduced test relies on changing a function from returning false
> to returning true.
>
> To simplify the burden of keeping a patch that can be provided to
>
Hi Andrew,
On Tue, Dec 5, 2023 at 11:53 AM Andrew Cooper wrote:
>
> On 05/12/2023 8:14 am, Bertrand Marquis wrote:
> > Hi Julien,
> >
> > Thanks a lot for your review and comment, this is very helpful.
> >
> >> On 4 Dec 2023, at 20:24, Julien Grall wrote:
> >>
> >> Hi Jens,
> >>
> >> On
On 05/12/2023 10:50 am, Xin Li wrote:
> diff --git a/arch/x86/entry/entry_fred.c b/arch/x86/entry/entry_fred.c
> new file mode 100644
> index ..215883e90f94
> --- /dev/null
> +++ b/arch/x86/entry/entry_fred.c
> @@ -0,0 +1,230 @@
> ...
> +static noinstr void fred_intx(struct pt_regs
flight 183989 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183989/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-i386-pvops 6 kernel-build fail REGR. vs. 183973
Tests which are
On 05/12/2023 09:28, Michal Orzel wrote:
Hi Julien,
On 04/12/2023 20:55, Julien Grall wrote:
On 04/12/2023 13:02, Ayan Kumar Halder wrote:
On 04/12/2023 10:31, Julien Grall wrote:
Hi Ayan,
Hi Julien,
On 01/12/2023 18:50, Ayan Kumar Halder wrote:
Currently if user enables HVC_DCC
On 05/12/2023 10:30, Michal Orzel wrote:
On 05/12/2023 11:01, Julien Grall wrote:
On 05/12/2023 09:28, Michal Orzel wrote:
Hi Julien,
On 04/12/2023 20:55, Julien Grall wrote:
On 04/12/2023 13:02, Ayan Kumar Halder wrote:
On 04/12/2023 10:31, Julien Grall wrote:
Hi Ayan,
Hi
From: "H. Peter Anvin (Intel)"
MSR_IA32_FRED_RSP0 is used during ring 3 event delivery, and needs to
be updated to point to the top of next task stack during task switch.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/include/asm/switch_to.h |
struct pt_regs is hard to read because the member or section related
comments are not aligned with the members.
The 'cs' and 'ss' members of pt_regs are type of 'unsigned long' while
in reality they are only 16-bit wide. This works so far as the
remaining space is unused, but FRED will use the
From: "H. Peter Anvin (Intel)"
Any FRED CPU will always have the following features as its baseline:
1) LKGS, load attributes of the GS segment but the base address into
the IA32_KERNEL_GS_BASE MSR instead of the GS segment’s descriptor
cache.
2) WRMSRNS, non-serializing WRMSR for
Intel VT-x classifies events into eight different types, which is
inherited by FRED for event identification. As such, event type
becomes a common x86 concept, and should be defined in a common x86
header.
Add event type macros to , and use it in .
Suggested-by: H. Peter Anvin (Intel)
WRMSRNS is an instruction that behaves exactly like WRMSR, with
the only difference being that it is not a serializing instruction
by default. Under certain conditions, WRMSRNS may replace WRMSR to
improve performance.
Add its CPU feature bit, opcode to the x86 opcode map, and an
always inline
From: "H. Peter Anvin (Intel)"
Let cpu_init_exception_handling() call cpu_init_fred_exceptions() to
initialize FRED. However if FRED is unavailable or disabled, it falls
back to set up TSS IST and initialize IDT.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Co-developed-by: Xin
From: "H. Peter Anvin (Intel)"
On a FRED system, the faulting address (CR2) is passed on the stack,
to avoid the problem of transient state. Thus the page fault address
is read from the FRED stack frame instead of CR2 when FRED is enabled.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan
From: "H. Peter Anvin (Intel)"
Add the configuration option CONFIG_X86_FRED to enable FRED.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/Kconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
If the stack frame contains an invalid user context (e.g. due to invalid SS,
a non-canonical RIP, etc.) the ERETU instruction will trap (#SS or #GP).
>From a Linux point of view, this really should be considered a user space
failure, so use the standard fault fixup mechanism to intercept the
From: "H. Peter Anvin (Intel)"
ERETU returns from an event handler while making a transition to ring 3,
and ERETS returns from an event handler while staying in ring 0.
Add instruction opcodes used by ERET[US] to the x86 opcode map; opcode
numbers are per FRED spec v5.0.
Signed-off-by: H.
idtentry_sysvec is really just DECLARE_IDTENTRY defined in
, no need to define it separately.
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/entry/entry_32.S | 4
arch/x86/entry/entry_64.S | 8
arch/x86/include/asm/idtentry.h | 2 +-
3 files changed, 1
This patch set enables the Intel flexible return and event delivery
(FRED) architecture for x86-64.
The FRED architecture defines simple new transitions that change
privilege level (ring transitions). The FRED architecture was
designed with the following goals:
1) Improve overall performance and
From: "H. Peter Anvin (Intel)"
Add CONFIG_X86_FRED to to make
cpu_feature_enabled() work correctly with FRED.
Originally-by: Megha Dey
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
Changes since v10:
* FRED feature is defined in cpuid word 12, not 13
To enable FRED, a new kernel command line option "fred" needs to be added.
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
arch/x86/kernel/cpu/common.c| 3 +++
2 files changed, 6 insertions(+)
diff --git
From: "H. Peter Anvin (Intel)"
On a FRED system, NMIs nest both with themselves and faults, transient
information is saved into the stack frame, and NMI unblocking only
happens when the stack frame indicates that so should happen.
Thus, the NMI entry stub for FRED is really quite small...
From: "Peter Zijlstra (Intel)"
PUSH_AND_CLEAR_REGS could be used besides actual entry code; in that case
%rbp shouldn't be cleared (otherwise the frame pointer is destroyed) and
UNWIND_HINT shouldn't be added.
Signed-off-by: Peter Zijlstra (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
Briefly introduce FRED, and its advantages compared to IDT.
Reviewed-by: Bagas Sanjaya
Signed-off-by: Xin Li
---
Changes since v10:
* Reword a sentence to improve readability (Nikolay Borisov).
---
Documentation/arch/x86/x86_64/fred.rst | 96 +
On 05.12.2023 11:35, Juergen Gross wrote:
> Update the Mini-OS upstream revision.
>
> Signed-off-by: Juergen Gross
Acked-by: Jan Beulich
On 2023/12/5 17:19, Roger Pau Monné wrote:
> On Mon, Dec 04, 2023 at 02:19:33PM -0800, Stefano Stabellini wrote:
>> On Mon, 4 Dec 2023, Roger Pau Monné wrote:
>>> On Fri, Dec 01, 2023 at 07:37:55PM -0800, Stefano Stabellini wrote:
On Fri, 1 Dec 2023, Roger Pau Monné wrote:
> On Thu, Nov
On 05/12/2023 11:01, Julien Grall wrote:
>
>
> On 05/12/2023 09:28, Michal Orzel wrote:
>> Hi Julien,
>>
>> On 04/12/2023 20:55, Julien Grall wrote:
>>>
>>>
>>> On 04/12/2023 13:02, Ayan Kumar Halder wrote:
On 04/12/2023 10:31, Julien Grall wrote:
> Hi Ayan,
Hi Julien,
Hi Julien,
Thanks for the feedback. I'm answering the straightforward issues here
and saving the rest for the emerging thread.
On Mon, Dec 4, 2023 at 8:24 PM Julien Grall wrote:
>
> Hi Jens,
>
> On 04/12/2023 07:55, Jens Wiklander wrote:
> > When an FF-A enabled guest is destroyed it may leave
Add sysvec_install() to install a system interrupt handler into the IDT
or the FRED system interrupt handler table.
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
Changes since v8:
* Introduce a macro sysvec_install() to derive the asm handler name from
a C handler, which simplifies the code
From: "H. Peter Anvin (Intel)"
Add MSR numbers for the FRED configuration registers per FRED spec 5.0.
Originally-by: Megha Dey
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/include/asm/msr-index.h | 13 -
From: "H. Peter Anvin (Intel)"
Add X86_CR4_FRED macro for the FRED bit in %cr4. This bit must not be
changed after initialization, so add it to the pinned CR4 bits.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
Changes since v9:
* Avoid a type cast by
From: "H. Peter Anvin (Intel)"
Because FRED always restores the full value of %rsp, ESPFIX is
no longer needed when it's enabled.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
arch/x86/kernel/espfix_64.c | 8
1 file changed, 8 insertions(+)
On 05.12.2023 10:19, Roger Pau Monné wrote:
> On Mon, Dec 04, 2023 at 02:19:33PM -0800, Stefano Stabellini wrote:
>> On Mon, 4 Dec 2023, Roger Pau Monné wrote:
>>> On Fri, Dec 01, 2023 at 07:37:55PM -0800, Stefano Stabellini wrote:
On Fri, 1 Dec 2023, Roger Pau Monné wrote:
> On Thu, Nov
On Mon, Dec 04, 2023 at 02:07:51PM -0800, Stefano Stabellini wrote:
> On Mon, 4 Dec 2023, Roger Pau Monné wrote:
> > On Fri, Dec 01, 2023 at 06:56:32PM -0800, Stefano Stabellini wrote:
> > > On Fri, 1 Dec 2023, Roger Pau Monné wrote:
> > > > On Mon, Nov 13, 2023 at 05:21:13PM -0500, Stewart
From: "H. Peter Anvin (Intel)"
When occurred on different ring level, i.e., from user or kernel context,
#DB needs to be handled on different stack: User #DB on current task
stack, while kernel #DB on a dedicated stack. This is exactly how FRED
event delivery invokes an exception handler: ring 3
FRED and IDT can share most of the definitions and declarations so
that in the majority of cases the actual handler implementation is the
same.
The differences are the exceptions where FRED stores exception related
information on the stack and the sysvec implementations as FRED can
handle
Add missing parameter names. No functional change.
Signed-off-by: Federico Serafini
---
xen/arch/x86/cpu/mcheck/mce.h | 2 +-
xen/arch/x86/include/asm/mce.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
Add missing parameter names to address violations of MISRA C:2012
Rule 8.2. Furthermore, remove trailing spaces and use C standard types to
comply with XEN coding style.
No functional change.
Signed-off-by: Federico Serafini
---
xen/drivers/passthrough/amd/iommu.h | 17 ++---
Add missing parameter names. No functional change.
Signed-off-by: Federico Serafini
---
xen/arch/x86/include/asm/mm.h | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index
Add missing parameter names to address violations of MISRA C:2012
Rule 8.2. Furthermore, use C standard types to comply with XEN coding style.
No functional change.
Signed-off-by: Federico Serafini
---
xen/drivers/passthrough/pci.c | 8
xen/include/xen/pci.h | 3 ++-
2 files
Add missing parameter names to address violations of MISRA C:2012
Rule 8.2. Furthermore, use C standard types to comply with XEN coding style.
No functional change.
Signed-off-by: Federico Serafini
---
xen/arch/x86/include/asm/acpi.h | 2 +-
xen/include/acpi/apei.h
This patch series adds the missing parameter names and makes some
improvements to the coding style as the removal of trailing spaces and
the use of C standard integer types over Linux typedefs.
No functional changes are introduced.
Federico Serafini (6):
xen/acpi: address remaining violations
Add missing parameter names. No functional change.
Signed-off-by: Federico Serafini
---
xen/arch/x86/include/asm/page.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/include/asm/page.h b/xen/arch/x86/include/asm/page.h
index 93a7b368ac..350d1fb110 100644
Instead of defining get_unaligned() and put_unaligned() in a way that
is only supporting architectures allowing unaligned accesses, use the
same approach as the Linux kernel and let the compiler do the
decision how to generate the code for probably unaligned data accesses.
Update
Update Xen's unaligned.h header to support all architectures, allowing
to remove the architecture specific variants (x86 only until now).
Juergen Gross (2):
xen: make include/xen/unaligned.h usable on all architectures
xen: remove asm/unaligned.h
xen/arch/x86/include/asm/unaligned.h | 6
With include/xen/unaligned.h now dealing properly with unaligned
accesses for all architectures, asm/unaligned.h can be removed and
users can be switched to include xen/unaligned.h instead.
Signed-off-by: Juergen Gross
---
xen/arch/x86/include/asm/unaligned.h | 6 --
xen/common/lz4/defs.h
On 05/12/2023 8:14 am, Bertrand Marquis wrote:
> Hi Julien,
>
> Thanks a lot for your review and comment, this is very helpful.
>
>> On 4 Dec 2023, at 20:24, Julien Grall wrote:
>>
>> Hi Jens,
>>
>> On 04/12/2023 07:55, Jens Wiklander wrote:
>>>if ( ctx->rx )
>>> rxtx_unmap(ctx);
From: "H. Peter Anvin (Intel)"
The code to actually handle kernel and event entry/exit using
FRED. It is split up into two files thus:
- entry_64_fred.S contains the actual entrypoints and exit code, and
saves and restores registers.
- entry_fred.c contains the two-level event dispatch code
From: "H. Peter Anvin (Intel)"
Add a header file for FRED prototypes and definitions.
Signed-off-by: H. Peter Anvin (Intel)
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
Changes since v6:
* Replace pt_regs csx flags prefix FRED_CSL_ with FRED_CSX_.
---
arch/x86/include/asm/fred.h | 68
Hi,
On Tue, Dec 5, 2023 at 9:14 AM Bertrand Marquis
wrote:
>
> Hi Julien,
>
> Thanks a lot for your review and comment, this is very helpful.
>
> > On 4 Dec 2023, at 20:24, Julien Grall wrote:
> >
> > Hi Jens,
> >
> > On 04/12/2023 07:55, Jens Wiklander wrote:
> >> When an FF-A enabled guest is
On 04.12.2023 18:27, Roger Pau Monné wrote:
> On Tue, Nov 28, 2023 at 11:34:04AM +0100, Jan Beulich wrote:
>> ..., at least as reasonably feasible without making a check hook
>> mandatory (in particular strict vs relaxed/zero-extend length checking
>> can't be done early this way).
>>
>> Note that
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