If the actual SMI source is not related to some place in the NMI
handler code but was eg. due to some SMI timer, lowering NMI
watchdog frequency might not fix the issue completely, but lower
its reproducibility (perhaps to some very rare occurrences). So
it's better be
flight 118622 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118622/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemut-ws16-amd64 16 guest-localmigrate/x10 fail REGR. vs.
118607
Hi, this time works for me.
If there's time I'd like to discuss the timing of re-submitting the Xilinx EEMI
power-management mediator.
Also, there were some questions in the previous review. Some are straight
forward but some were around the configuration-less approach so I thought I
could
flight 118615 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118615/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-ws16-amd64 17 guest-stop fail REGR. vs. 115539
Tests which did not
On Tue, 6 Feb 2018, Denis Obrezkov wrote:
> > Hello Denis,
> >
> Hello Stefano,
> > it is great to see interest in Xen on ARM and this project!
> >
> > Unfortunately RPi3 can't run Xen as far as I know due to their non-ARM
> > interrupt controller without virtualization support. Otherwise it would
flight 118613 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118613/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt-xsm 14 saverestore-support-checkfail like 118600
test-armhf-armhf-libvirt 14
On Tue, 2018-02-06 at 17:02 +, George Dunlap wrote:
> On 02/06/2018 06:18 AM, Juergen Gross wrote:
> > On 05/02/18 17:53, Dario Faggioli wrote:
> > >
> > > Considering we're releasing in June, but freezing in March, do we
> > > think
> > > it is still early enough?
>
> > The 4.11 release is
flight 118626 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118626/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
On Tue, 6 Feb 2018, Wei Liu wrote:
On Tue, Jan 30, 2018 at 10:55:47PM +, Michael Young wrote:
Xen built with ocaml 4.06 gives errors such as
Error: This expression has type bytes but an expression was
expected of type string
as Byte and safe-strings which were introduced in 4.02
On 06/02/18 16:23, Jan Beulich wrote:
On 06.02.18 at 17:14, wrote:
>> On 06/02/18 16:07, Jan Beulich wrote:
>> On 05.02.18 at 22:18, wrote:
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -34,7 +34,8 @@
branch xen-unstable
xenbranch xen-unstable
job build-armhf-pvops
testid kernel-build
Tree: linux git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Tree: linuxfirmware git://xenbits.xen.org/osstest/linux-firmware.git
*** Found and reproduced problem changeset ***
Bug is in
When booting using Grub on Thunder-X, the number of memory available is
greater than 64. Bump the number to 128, so we can take advantage of all
the memory.
Signed-off-by: Julien Grall
---
Note that I wasn't able to boot without this patch, because EFI stub
is
Hi all,
This small series will help to boot Xen on Thunder-X using Grub. This part
of my work to use Thunder-X in Osstest
Cheers,
Julien Grall (2):
xen/arm: Extend the number of memory banks supported
xen/arm: Blacklist SMMU on Thunder-X
xen/arch/arm/platforms/Makefile | 1 +
flight 118620 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118620/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm
Hi Andre,
On 02/06/2018 05:09 PM, Andre Przywara wrote:
At the moment we happily access VGIC internal data structures like
the rank and struct pending_irq in gic.c, which should be VGIC agnostic.
Factor out a new function vgic_connect_hw_irq(), which allows a virtual
IRQ to be connected to a
Hi,
On 02/06/2018 04:36 PM, Volodymyr Babchuk wrote:
On 5 February 2018 at 15:20, Julien Grall wrote:
The function SMCCC_ARCH_WORKAROUND_1 will be called by the guest for
hardening the branch predictor. So we want the handling to be as fast as
possible.
As the
On Tue, 6 Feb 2018 17:21:19 +
Igor Druzhinin wrote:
>On 06/02/18 17:08, Alexey G wrote:
>> The major concern here is the possiblity of SMI being triggered _not_
>> by some specific I/O port access. Primarily, if it actually was a
>> periodic SMI.
>>
>> If the
On 02/06/2018 04:23 PM, Volodymyr Babchuk wrote:
Hi,
Hi,
On 5 February 2018 at 15:20, Julien Grall wrote:
SMCCC 1.1 offers firmware-based CPU workarounds. In particular,
SMCCC_ARCH_WORKAROUND_1 provides BP hardening for variant 2 of XSA-254
(CVE-2017-5715).
If the
On Tue, Feb 06, 2018 at 01:24:30PM +, Julien Grall wrote:
> > if (libxl__device_pci_destroy_all(gc, domid) < 0)
> > LOGD(ERROR, domid, "Pci shutdown failed");
> > rc = xc_domain_pause(ctx->xch, domid);
> > diff --git a/tools/libxl/libxl_internal.h
Hi,
On 02/06/2018 04:18 PM, Volodymyr Babchuk wrote:
On 5 February 2018 at 15:20, Julien Grall wrote:
The new SMC Calling Convention (v1.1) allows for a reduced overhead when
calling into the firmware, and provides a new feature discovery
mechanism. See ARM DEN 00070A.
On Tue, Feb 06, 2018 at 05:30:50PM +, Julien Grall wrote:
>
>
> On 02/06/2018 03:59 PM, Zhongze Liu wrote:
> > Hi Julien,
>
> Hi,
>
>
> > 2018-02-06 21:07 GMT+08:00 Julien Grall :
> > > Hi,
> > >
> > > On 01/30/2018 05:50 PM, Zhongze Liu wrote:
> > > >
> > > > Add
On 02/06/2018 04:07 PM, Volodymyr Babchuk wrote:
Hi,
Hi Volodymyr,
Thank you for the review.
On 5 February 2018 at 15:20, Julien Grall wrote:
At the moment, Xen provides virtual PSCI interface compliant with 0.1
and 0.2. Since them, the specification has been
On 01/26/2018 12:07 PM, Jan Beulich wrote:
> In case we can detect single-threaded guest processes (by checking
> whether we can account for all root page table uses locally on the vCPU
> that's running), there's no point in issuing a sync IPI upon an L4 entry
> update, as no other vCPU of the
On 02/06/2018 03:59 PM, Zhongze Liu wrote:
Hi Julien,
Hi,
2018-02-06 21:07 GMT+08:00 Julien Grall :
Hi,
On 01/30/2018 05:50 PM, Zhongze Liu wrote:
Add libxl__sshm_add to map shared pages from one DomU to another, The
mapping
process involves the follwing steps:
On 02/06/2018 04:06 PM, Zhongze Liu wrote:
Hi,
Hi,
2018-02-06 23:46 GMT+08:00 Julien Grall :
Hi,
On 02/06/2018 03:41 PM, Zhongze Liu wrote:
Thanks for reviewing.
2018-02-06 19:27 GMT+08:00 Julien Grall :
Hi,
On 01/30/2018 05:50 PM,
On 06/02/18 17:08, Alexey G wrote:
> On Tue, 6 Feb 2018 14:21:12 +
> Andrew Cooper wrote:
>
>> On 06/02/18 03:10, Alexey G wrote:
>>> I/O port 61h normally is not emulated by SMI legacy kbd handling code
>>> in BIOS, only ports like 60h, 64h, etc.
>>> Contrary to
(Three months after you sent this, sorry...)
On Mon, Nov 06, 2017 at 12:33:06PM +, Joao Martins wrote:
> On Mon, Nov 06, 2017 at 10:33:59AM +, Paul Durrant wrote:
> > > -Original Message-
> > > From: Joao Martins [mailto:joao.m.mart...@oracle.com]
> > > Sent: 02 November 2017
The functions to actually populate a list register were accessing
the VGIC internal pending_irq struct, although they should be abstracting
from that.
Break the needed information down to remove the reference to pending_irq
from gic-v[23].c.
Signed-off-by: Andre Przywara
On ARM the maximum number of IRQs is a constant, but we share it being
a variable to match x86. Since we are not supposed to alter it, let's
mark it as "const" to avoid accidental change.
Suggested-by: Julien Grall
Signed-off-by: Andre Przywara
Currently gic.c holds code to handle hardware IRQs as well as code to
bridge VGIC requests to the GIC virtualization hardware.
Despite being named gic.c, this file reaches into the VGIC and uses data
structures describing virtual IRQs.
To improve abstraction, move the VGIC functions into a
Hi,
a minor update over the last post. Added tags, extended one commit
message and added an error return in patch 5/8.
Please test and apply.
Cheers,
Andre
Changelog v4->v5
01: unchanged
02: reordered headers, added tag
03, 04: unchanged
05: return an error if irq_desc does not match, extended
In gic_restore_pending_irqs() we push our pending virtual IRQs into the
list registers. This function is called once from gic_inject(), just
before we return to the guest, but also in gic_restore_state(), when
we context-switch a VCPU. Having a closer look it turns out that the
later call is not
At the moment we happily access VGIC internal data structures like
the rank and struct pending_irq in gic.c, which should be VGIC agnostic.
Factor out a new function vgic_connect_hw_irq(), which allows a virtual
IRQ to be connected to a hardware IRQ (using the hw bit in the LR).
This removes
In event.h we very deeply dive into the VGIC to learn if an event for
a guest is pending.
Rework that function to abstract the VGIC specific part out. Also
reorder the queries there, as we only actually need to check for the
event channel if there are no other pending IRQs.
Signed-off-by: Andre
Currently gic_dump_info() not only dumps the hardware state of the GIC,
but also the VGIC internal virtual IRQ lists.
Split the latter off and move it into gic-vgic.c to observe the abstraction.
Signed-off-by: Andre Przywara
Reviewed-by: Stefano Stabellini
At the moment we happily access the VGIC internal struct pending_irq
(which describes a virtual IRQ) in irq.c.
Factor out the actually needed functionality to learn the associated
hardware IRQ and move that into gic-vgic.c to improve abstraction.
Signed-off-by: Andre Przywara
On Tue, 6 Feb 2018 14:21:12 +
Andrew Cooper wrote:
>On 06/02/18 03:10, Alexey G wrote:
>> I/O port 61h normally is not emulated by SMI legacy kbd handling code
>> in BIOS, only ports like 60h, 64h, etc.
>> Contrary to USB legacy emulation, it has to intercept port
On 02/06/2018 06:18 AM, Juergen Gross wrote:
> On 05/02/18 17:53, Dario Faggioli wrote:
>> On Mon, 2018-02-05 at 13:01 +, George Dunlap wrote:
>>> And in any case, making those improvements
>>> on credit2 will be easier than on credit.
>>>
>> And, if possible, I agree with George on this even
On Tue, Feb 06, 2018 at 06:45:15PM +0200, Oleksandr Grytsov wrote:
> > > +static int libxl__set_xenstore_vkb(libxl__gc *gc, uint32_t domid,
> > > + libxl_device_vkb *vkb,
> > > + flexarray_t *back, flexarray_t
> > *front,
> > > +
On Tue, Jan 30, 2018 at 10:55:47PM +, Michael Young wrote:
> Xen built with ocaml 4.06 gives errors such as
> Error: This expression has type bytes but an expression was
> expected of type string
> as Byte and safe-strings which were introduced in 4.02 are the
> default in 4.06.
> This
On Tue, Feb 6, 2018 at 4:25 PM, Wei Liu wrote:
> On Wed, Nov 01, 2017 at 05:05:04PM +0200, Oleksandr Grytsov wrote:
> > From: Oleksandr Grytsov
> >
> > New field backend_type is added to vkb device
> > in order to have QEMU and user space backend
> As we do not have Jira access, it would be better to do it on Wiki or
> "something else".
The project has Jira access and can give selected community members write access
Read access is not an issue
Lars
On 06/02/2018, 11:22, "Artem Mygaiev" wrote:
Hi
Hi,
On 06.02.18 17:53, Julien Grall wrote:
At the moment PSCI function dispatching is done in vsmc.c and the
function implementation in vpsci.c. Some bits of the implementation is
even done in vsmc.c (see PSCI_SYSTEM_RESET).
This means that it is difficult to follow the implementation and also
Hi,
On 5 February 2018 at 15:20, Julien Grall wrote:
> The function SMCCC_ARCH_WORKAROUND_1 will be called by the guest for
> hardening the branch predictor. So we want the handling to be as fast as
> possible.
>
> As the mitigation is applied on every guest exit, we can
On 06/02/18 16:23, Jan Beulich wrote:
On 06.02.18 at 17:14, wrote:
>> On 06/02/18 16:07, Jan Beulich wrote:
>> On 05.02.18 at 22:18, wrote:
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -34,7 +34,8 @@
On 06/02/18 16:23, Jan Beulich wrote:
On 06.02.18 at 17:14, wrote:
>> On 06/02/18 16:07, Jan Beulich wrote:
>> On 05.02.18 at 22:18, wrote:
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -34,7 +34,8 @@
Hi,
On 5 February 2018 at 15:20, Julien Grall wrote:
> Signed-off-by: Julien Grall
Reviewed-by: Volodymyr Babchuk
> ---
> xen/include/asm-arm/smccc.h | 16 ++--
> 1 file changed, 10 insertions(+), 6
Hi,
On 5 February 2018 at 15:20, Julien Grall wrote:
> SMCCC 1.1 offers firmware-based CPU workarounds. In particular,
> SMCCC_ARCH_WORKAROUND_1 provides BP hardening for variant 2 of XSA-254
> (CVE-2017-5715).
>
> If the hypervisor has some mitigation for this issue,
>>> On 06.02.18 at 17:14, wrote:
> On 06/02/18 16:07, Jan Beulich wrote:
> On 05.02.18 at 22:18, wrote:
>>> --- a/xen/arch/x86/nmi.c
>>> +++ b/xen/arch/x86/nmi.c
>>> @@ -34,7 +34,8 @@
>>> #include
>>>
>>> unsigned int nmi_watchdog =
On 5 February 2018 at 15:20, Julien Grall wrote:
> The new SMC Calling Convention (v1.1) allows for a reduced overhead when
> calling into the firmware, and provides a new feature discovery
> mechanism. See ARM DEN 00070A.
Сould you please use also a human-readable document
On 06/02/18 16:07, Jan Beulich wrote:
On 05.02.18 at 22:18, wrote:
>> --- a/xen/arch/x86/nmi.c
>> +++ b/xen/arch/x86/nmi.c
>> @@ -34,7 +34,8 @@
>> #include
>>
>> unsigned int nmi_watchdog = NMI_NONE;
>> -static unsigned int nmi_hz = HZ;
>> +/* initial watchdog
flight 118607 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118607/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-amd64-i386-rumprun-i386 17 rumprun-demo-xenstorels/xenstorels.repeat fail
REGR. vs. 118582
Tests
>>> On 06.02.18 at 14:48, wrote:
> The original version of this logic was:
>
> /*
> * On Intel hardware, we'd like to use retpoline in preference to
> * IBRS, but only if it is safe on this hardware.
> */
> else if (
*CALL
FOR PAPERS 13th Workshop on Virtualization in High-Performance Cloud
Computing (VHPC '18)held in conjunction with the International
Supercomputing Conference - High Performance,June 24-28, 2018, Frankfurt,
Hi,
On 5 February 2018 at 15:20, Julien Grall wrote:
> At the moment, Xen provides virtual PSCI interface compliant with 0.1
> and 0.2. Since them, the specification has been updated and the latest
> version is 1.1 (see ARM DEN 0022D).
>
> From an implementation point of
>>> On 05.02.18 at 22:18, wrote:
> --- a/xen/arch/x86/nmi.c
> +++ b/xen/arch/x86/nmi.c
> @@ -34,7 +34,8 @@
> #include
>
> unsigned int nmi_watchdog = NMI_NONE;
> -static unsigned int nmi_hz = HZ;
> +/* initial watchdog frequency - shouldn't be too high to avoid
Hi,
2018-02-06 23:46 GMT+08:00 Julien Grall :
> Hi,
>
> On 02/06/2018 03:41 PM, Zhongze Liu wrote:
>>
>> Thanks for reviewing.
>>
>> 2018-02-06 19:27 GMT+08:00 Julien Grall :
>>>
>>> Hi,
>>>
>>> On 01/30/2018 05:50 PM, Zhongze Liu wrote:
Hi Julien,
2018-02-06 21:07 GMT+08:00 Julien Grall :
> Hi,
>
> On 01/30/2018 05:50 PM, Zhongze Liu wrote:
>>
>> Add libxl__sshm_add to map shared pages from one DomU to another, The
>> mapping
>> process involves the follwing steps:
[...]
>> +
>> +/* Set default values for
Hi,
On 5 February 2018 at 15:20, Julien Grall wrote:
> Some PSCI functions are only available in the 32-bit version. After
> recent changes, Xen always needs to know whether the call was made using
> 32-bit id or 64-bit id. So we don't emulate reserved one.
>
> With the
Hi all,
This small patch series contains SMCCC fixes (see #2) and PSCI clean-up.
Cheers,
Julien Grall (3):
xen/arm: vpsci: Removing dummy MIGRATE and MIGRATE_INFO_UP_CPU
xen/arm: vsmc: Don't implement function ID that doesn't exist
xen/arm: vpsci: Move PSCI function dispatching from
At the moment PSCI function dispatching is done in vsmc.c and the
function implementation in vpsci.c. Some bits of the implementation is
even done in vsmc.c (see PSCI_SYSTEM_RESET).
This means that it is difficult to follow the implementation and also
requires to export functions for each PSCI
The current implementation of SMCCC relies on the fact only function
number (bits [15:0]) is enough to identify what to implement.
However, PSCI call are only available in the range 0x8400-0x841F
and 0xC400-0xC41F. Furthermore, not all SMC32 functions have
equivalent in the SMC64.
The PSCI call MIGRATE and MIGRATE_INFO_UP_CPU are optional and
implemented as just returning PSCI_NOT_SUPPORTED (aka UNKNOWN_FUNCTION
for SMCCC).
The new SMCCC framework is able to deal with unimplemented function and
return the proper error code. So remove the implementations for both
function.
On 06.02.18 17:39, Julien Grall wrote:
On 02/06/2018 03:28 PM, Volodymyr Babchuk wrote:
Hi Julien,
On 06.02.18 16:45, Julien Grall wrote:
[...]
+/*
+ * PSCI 0.2 or later calls. It will return false if the function
ID is
+ * not handled.
+ */
+bool do_vpsci_0_2_call(struct cpu_user_regs
On 02/06/2018 03:44 PM, Andre Przywara wrote:
Hi,
On 06/02/18 14:21, Julien Grall wrote:
Hi Andre,
On 02/05/2018 04:19 PM, Andre Przywara wrote:
At the moment we happily access VGIC internal data structures like
the rank and struct pending_irq in gic.c, which should be VGIC agnostic.
Hi,
On 02/06/2018 03:41 PM, Zhongze Liu wrote:
Thanks for reviewing.
2018-02-06 19:27 GMT+08:00 Julien Grall :
Hi,
On 01/30/2018 05:50 PM, Zhongze Liu wrote:
Add a new structure to the IDL familiy to represent static shared memory
regions
[...]
+libxl_static_shm =
Hi,
On 06/02/18 14:21, Julien Grall wrote:
> Hi Andre,
>
> On 02/05/2018 04:19 PM, Andre Przywara wrote:
>> At the moment we happily access VGIC internal data structures like
>> the rank and struct pending_irq in gic.c, which should be VGIC agnostic.
>>
>> Factor out a new function
Hi Julien,
On 5 February 2018 at 15:20, Julien Grall wrote:
> Currently, the behavior of do_common_cpu will slightly change depending
> on the PSCI version passed in parameter. Looking at the code, more the
> specific 0.2 behavior could move out of the function or adapted
On 02/06/2018 03:28 PM, Volodymyr Babchuk wrote:
Hi Julien,
On 06.02.18 16:45, Julien Grall wrote:
[...]
+/*
+ * PSCI 0.2 or later calls. It will return false if the function
ID is
+ * not handled.
+ */
+bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
+{
+ /*
+ *
On 02/06/2018 03:15 PM, Volodymyr Babchuk wrote:
Hi Julien,
Hi,
On 06.02.18 16:53, Julien Grall wrote:
On 02/02/2018 01:46 PM, Volodymyr Babchuk wrote:
On 02.02.18 13:41, Julien Grall wrote:
The current implementation of SMCCC relies on the fact only function
number (bits [15:0]) is
Hi Julien,
On 06.02.18 16:45, Julien Grall wrote:
[...]
+/*
+ * PSCI 0.2 or later calls. It will return false if the function
ID is
+ * not handled.
+ */
+bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
+{
+ /*
+ * /!\ VPSCI_NR_FUNCS (in asm-arm/vpsci.h) should be
Hi Julien,
On 06.02.18 16:53, Julien Grall wrote:
Hi Volodymyr,
On 02/02/2018 01:46 PM, Volodymyr Babchuk wrote:
On 02.02.18 13:41, Julien Grall wrote:
The current implementation of SMCCC relies on the fact only function
number (bits [15:0]) is enough to identify what to implement.
> On Jan 22, 2018, at 11:18, Lars Kurth wrote:
>
> Hi all,
> I will post the following new version of the FAQ on
> https://blog.xenproject.org/ in a moment. As there are tables in it, I will
> post as PDF rather than text. This thread is primarily a placeholder to
Hi Volodymyr,
On 02/02/2018 01:46 PM, Volodymyr Babchuk wrote:
On 02.02.18 13:41, Julien Grall wrote:
The current implementation of SMCCC relies on the fact only function
number (bits [15:0]) is enough to identify what to implement.
However, PSCI call are only available in the range
On Wed, Nov 01, 2017 at 05:04:44PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
> Add getting vsnd list amd info API
>
> Signed-off-by: Oleksandr Grytsov
> ---
> tools/libxl/libxl.h | 10 ++
>
On Wed, Nov 01, 2017 at 05:04:43PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
> Add PV sound device described in sndif.h
>
> Signed-off-by: Oleksandr Grytsov
Acked-by: Wei Liu
(I haven't checked if
On Wed, Nov 01, 2017 at 05:04:45PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
> Add config parser for virtual sound devices
>
> Signed-off-by: Oleksandr Grytsov
> +
> +int parse_vsnd_item(libxl_device_vsnd *vsnd, const
On Wed, Nov 01, 2017 at 05:04:47PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
> Update documentation with virtual sound device
>
> Signed-off-by: Oleksandr Grytsov
Acked-by: Wei Liu
On 02/06/2018 02:21 PM, Julien Grall wrote:
Hi Andre,
On 02/05/2018 04:19 PM, Andre Przywara wrote:
At the moment we happily access VGIC internal data structures like
the rank and struct pending_irq in gic.c, which should be VGIC agnostic.
Factor out a new function vgic_connect_hw_irq(),
On 02/02/18 18:42, Joao Martins wrote:
> Commit fd8aa9095a95 ("xen: optimize xenbus driver for multiple concurrent
> xenstore accesses") optimized xenbus concurrent accesses but in doing so
> broke UABI of /dev/xen/xenbus. Through /dev/xen/xenbus applications are in
> charge of xenbus message
On Wed, Nov 01, 2017 at 05:05:07PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
Acked-by: Wei Liu
___
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On Wed, Nov 01, 2017 at 05:05:06PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
Acked-by: Wei Liu
___
Xen-devel mailing list
Xen-devel@lists.xenproject.org
On Wed, Nov 01, 2017 at 05:05:05PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
Acked-by: Wei Liu
___
Xen-devel mailing list
Xen-devel@lists.xenproject.org
On Wed, Nov 01, 2017 at 05:05:05PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
Acked-by: Wei Liu
___
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On Wed, Nov 01, 2017 at 05:05:04PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
> New field backend_type is added to vkb device
> in order to have QEMU and user space backend
> simultaneously. Each vkb backend shall read
> appropriate XS entry and
On 06/02/18 03:10, Alexey G wrote:
> On Mon, 5 Feb 2018 21:18:42 +
> Igor Druzhinin wrote:
>
>> We're noticing a reproducible system boot hang on certain
>> post-Skylake platforms where the BIOS is configured in
>> legacy boot mode with x2APIC disabled. The system
Hi Andre,
On 02/05/2018 04:19 PM, Andre Przywara wrote:
At the moment we happily access the VGIC internal struct pending_irq
(which describes a virtual IRQ) in irq.c.
Factor out the actually needed functionality to learn the associated
hardware IRQ and move that into gic-vgic.c to improve
Hi Andre,
On 02/05/2018 04:19 PM, Andre Przywara wrote:
At the moment we happily access VGIC internal data structures like
the rank and struct pending_irq in gic.c, which should be VGIC agnostic.
Factor out a new function vgic_connect_hw_irq(), which allows a virtual
IRQ to be connected to a
On 05/02/18 21:18, Igor Druzhinin wrote:
> We're noticing a reproducible system boot hang on certain
> post-Skylake platforms where the BIOS is configured in
Its just a plain Skylake Server, from what I can see.
> legacy boot mode with x2APIC disabled. The system stalls
> immediately after
Hi,
On 02/05/2018 04:19 PM, Andre Przywara wrote:
diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c
new file mode 100644
index 00..263b430075
--- /dev/null
+++ b/xen/arch/arm/gic-vgic.c
@@ -0,0 +1,396 @@
+/*
+ * xen/arch/arm/gic-vgic.c
+ *
+ * ARM Generic Interrupt
On Tue, Feb 06, 2018 at 05:45:18AM -0700, Jan Beulich wrote:
> >>> On 06.02.18 at 13:36, wrote:
> > On Wed, Jan 31, 2018 at 09:55:21AM -0700, Jan Beulich wrote:
> >> - Excluding symlinks in the source tree is a problem for me: Short of
> >> out-of-tree builds, in order to
The original version of this logic was:
/*
* On Intel hardware, we'd like to use retpoline in preference to
* IBRS, but only if it is safe on this hardware.
*/
else if ( boot_cpu_has(X86_FEATURE_IBRSB) )
{
if ( retpoline_safe() )
thunk =
Hi,
On 01/30/2018 05:50 PM, Zhongze Liu wrote:
Add docs to document the motivation, usage, use cases and other
relevant information about the static shared memory feature.
This is for the proposal "Allow setting up shared memory areas between VMs
from xl config file". See:
Hi,
On 01/30/2018 05:50 PM, Zhongze Liu wrote:
Add libxl__sshm_del to unmap static shared memory areas mapped by
libxl__sshm_add during domain creation. The unmapping process is:
* For a master: decrease the refcount of the sshm region, if the refcount
reaches 0, cleanup the whole sshm
On 06/02/18 12:30, Zhenzhong Duan wrote:
> 在 2018/2/6 19:56, Andrew Cooper 写道:
>> On 06/02/18 11:41, Zhenzhong Duan wrote:
>>> On 2018/2/6 18:50, Andrew Cooper wrote:
On 06/02/18 10:29, zhenzhong.duan wrote:
>
>
> 2018年2月6日 17:20于 Andrew Cooper
On Tue, Feb 6, 2018 at 2:36 PM, Wei Liu wrote:
> On Thu, Dec 14, 2017 at 04:14:12PM +0200, Oleksandr Grytsov wrote:
> > From: Oleksandr Grytsov
> >
> > We have following arm-based setup:
> >
> > - Dom0 with xen and xen tools;
> > - Dom1 with
>>> On 06.02.18 at 13:36, wrote:
> On Wed, Jan 31, 2018 at 09:55:21AM -0700, Jan Beulich wrote:
>> - Excluding symlinks in the source tree is a problem for me: Short of
>> out-of-tree builds, in order to easily build test multiple
>> configurations, I'm setting up my
Hi, Wei!
On 02/06/2018 02:36 PM, Wei Liu wrote:
On Wed, Dec 20, 2017 at 06:27:02PM +0200, Oleksandr Andrushchenko wrote:
Hi, all!
While trying to reboot a domain which has iomem configured
(we are passing through some devices), I found an issue,
that after domain reboot those iomem's are
On Thu, Dec 14, 2017 at 04:14:12PM +0200, Oleksandr Grytsov wrote:
> From: Oleksandr Grytsov
>
> We have following arm-based setup:
>
> - Dom0 with xen and xen tools;
> - Dom1 with device backends (but it is not the driver domain);
What is your definition of a
On Thu, Feb 01, 2018 at 12:22:43AM -0700, Jan Beulich wrote:
> At least Linux kernels have been able to work with gzip-ed initrd for
> quite some time; initrd compressed with other methods aren't even being
> attempted to unpack. Furthermore the unzip-ing routine used here isn't
> capable of
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