Workaround for Cortex-A57 erratum #852523 is already
in Xen but Cortex-A72 erratum #853709 is not although
it applies to the same issue.
Signed-off-by: Michal Orzel
---
docs/misc/arm/silicon-errata.txt | 1 +
xen/arch/arm/domain.c| 6 --
2 files changed, 5 insertions(+), 2
Hi Julien,
I agree. You can update the commit message.
Thanks for review.
Michal
From: Julien Grall
Sent: Wednesday, October 14, 2020 12:56 PM
To: Michal Orzel ; xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ; Volodymyr Babchuk
; Bertrand Marquis
On 09.12.2020 02:34, Stefano Stabellini wrote:
> On Tue, 8 Dec 2020, Julien Grall wrote:
>> On 08/12/2020 14:38, Bertrand Marquis wrote:
>>> Hi Julien,
>>>
>>>> On 8 Dec 2020, at 09:47, Julien Grall wrote:
>>>>
>>>> Hi,
>>
to an aarch32 guest.
Signed-off-by: Michal Orzel
---
docs/misc/arm/silicon-errata.txt | 1 +
xen/arch/arm/Kconfig | 19 +++
xen/arch/arm/arm64/entry.S | 9 +
xen/arch/arm/cpuerrata.c | 8
xen/include/asm-arm/cpufeature.h | 3 ++-
5 files
circumstances TLBI+DSB completes before
a read using the translation being invalidated has been observed by
other observers. The workaround repeats the TLBI+DSB operation.
Signed-off-by: Michal Orzel
---
docs/misc/arm/silicon-errata.txt | 2 ++
xen/arch/arm/Kconfig | 18
On 16.11.2020 11:12, Julien Grall wrote:
> Hi Michal,
>
> On 16/11/2020 07:24, Michal Orzel wrote:
>> On the affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p0),
>> if a virtual address for a cacheable mapping of a location is being
>> accessed by a core whil
circumstances TLBI+DSB completes before
a read using the translation being invalidated has been observed by
other observers. The workaround repeats the TLBI+DSB operation
for all the TLB flush operations on purpose.
Signed-off-by: Michal Orzel
---
docs/misc/arm/silicon-errata.txt | 2 ++
xen
Hi Julien,
On 17.11.2020 18:30, Julien Grall wrote:
> Hi Michal,
>
> On 16/11/2020 12:11, Michal Orzel wrote:
>> On the affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p0),
>> if a virtual address for a cacheable mapping of a location is being
>> accessed b
Hi Jan,
On 21.01.2021 10:43, Jan Beulich wrote:
> On 21.01.2021 10:30, Michal Orzel wrote:
>> Fix compilation error when enabling early printk, introduced
>> by commit aa4b9d1ee6538b5cbe218d4d3fcdf9548130a063:
>> ```
>> debug.S: Assembler messages:
>> debug
rror: constant expression expected at operand 2 -- `ldr
x15,=((0x0040+(0)*PAGE_SIZE)+(0x1c09&~PAGE_MASK))`
```
The fix is to include header which now contains
definitions for page/size/mask etc.
Signed-off-by: Michal Orzel
---
xen/include/asm-arm/early_printk.h | 1 +
1 file changed, 1 i
On 21.05.2021 09:07, Jan Beulich wrote:
> On 21.05.2021 08:33, Michal Orzel wrote:
>> On 17.05.2021 18:03, Julien Grall wrote:
>>> On 17/05/2021 08:01, Jan Beulich wrote:
>>>> On 12.05.2021 19:59, Julien Grall wrote:
>>>>> Hi,
>&g
Hi Jan,
On 05.05.2021 10:00, Jan Beulich wrote:
> On 05.05.2021 09:43, Michal Orzel wrote:
>> --- a/xen/include/public/arch-arm.h
>> +++ b/xen/include/public/arch-arm.h
>> @@ -267,10 +267,10 @@ struct vcpu_guest_core_regs
>>
>> /* Return address an
Hi Julien,
On 05.05.2021 20:03, Julien Grall wrote:
> Hi Michal,
>
> On 05/05/2021 08:43, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
Hi guys,
On 17.05.2021 18:03, Julien Grall wrote:
> Hi Jan,
>
> On 17/05/2021 08:01, Jan Beulich wrote:
>> On 12.05.2021 19:59, Julien Grall wrote:
>>> Hi,
>>>
>>> On 11/05/2021 07:37, Michal Orzel wrote:
>>>> On 05.05.2021 10:00, Jan Beulic
ic outside interface
"public/vm_event.h" to allow ABI compatibility between 32bit and 64bit.
Signed-off-by: Michal Orzel
---
Changes since v3:
-Fix comment about padding
-Remove duplicated printk
Changes since v2:
-Remove _res0 members from structures inside hsr union
-Update commit message
On 06.07.2021 14:31, Julien Grall wrote:
>
>
> On 06/07/2021 13:30, Michal Orzel wrote:
>> Hi,
>>
>> On 06.07.2021 14:00, Olaf Hering wrote:
>>> Am Mon, 5 Jul 2021 08:39:52 +0200
>>> schrieb Michal Orzel :
>>>
>>>> Modify ty
Hi,
On 06.07.2021 14:00, Olaf Hering wrote:
> Am Mon, 5 Jul 2021 08:39:52 +0200
> schrieb Michal Orzel :
>
>> Modify type of hsr, cpsr, spsr_el1 to uint64_t.
>
> I think this is now commit 918b8842a852e0e7446286f546724b1c63c56c66, which
> fails to build:
>
>
Hi Julien,
On 07.06.2021 15:31, Julien Grall wrote:
> Hi,
>
> On 05/05/2021 08:43, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/WRITE_SYS
functions vreg_emulate_.
Implement a macro WRITE_SYSREG_SZ which expands as follows:
-on arm64: WRITE_SYSREG
-on arm32: WRITE_SYSREG{32/64}
As there are no other places in the code using these helpers
on arm64 - remove them.
Signed-off-by: Michal Orzel
---
Changes since v1:
-implement
functions vreg_emulate_.
Implement a macro WRITE_SYSREG_SZ which expands as follows:
-on arm64: WRITE_SYSREG
-on arm32: WRITE_SYSREG{32/64}
As there are no other places in the code using these helpers
on arm64 - remove them.
Signed-off-by: Michal Orzel
Reviewed-by: Bertrand Marquis
---
Changes
On 12.07.2021 10:33, Julien Grall wrote:
>
>
> On 12/07/2021 07:26, Michal Orzel wrote:
>> Hi Julien,
>
> Hi Michal,
>
>> On 09.07.2021 17:21, Julien Grall wrote:
>>> Hi Michal,
>>>
>>> On 09/07/2021 13:40, Michal Orzel wrote:
>
Hi Julien,
On 09.07.2021 17:21, Julien Grall wrote:
> Hi Michal,
>
> On 09/07/2021 13:40, Michal Orzel wrote:
>> AArch64 system registers are 64bit whereas AArch32 ones
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
a comment in Arm code that does not make sense.
>
> Signed-off-by: Julien Grall
Reviewed-by: Michal Orzel
>
> ---
> Changes in v5:
> - Rebase to the latest Xen
> - The patch is now arm only because mfn_to_gmfn() has
> been
> scripts expects the generated header to contain it.
>
> Fixes: 918b8842a852 ("arm64: Change type of hsr, cpsr, spsr_el1 to uint64_t")
Sorry for this inconvenience due to the lack of xen-tools testing.
> Reported-by: Andrew Cooper
> Signed-off-by: Julien Grall
>
Rev
> 918b8842a852 changed CPSR and SPSR to be stored as 64bit values.
>
> This is fixing the print size in some tools to use 64bit type.
>
> Fixes: 918b8842a852 ("arm64: Change type of hsr, cpsr, spsr_el1 to
> uint64_t")
Thanks Bertrand.
> Signed-off-by: Bertrand Mar
t; advantage in larger seed though.
>
> Depending on its configuration Linux can use the seed as device randomness
> or to just quickly initialize CRNG.
> In either case this will provide extra randomness to further harden CRNG.
>
> Signed-off-by: Sergiy Kibrik
> Reviewed-by:
Function arch_initialise_vcpu is not reachable as the
VCPUOP_initialise is an unsupported operation on arm.
Modify the function by adding ASSERT_UNREACHABLE() and
returning -EOPNOTSUPP.
Suggested-by: Jan Beulich
Signed-off-by: Michal Orzel
---
xen/arch/arm/domain.c | 3 ++-
1 file changed, 2
Hi Jilien,
On 21.04.2021 21:16, Julien Grall wrote:
> Hi Michal,
>
> On 20/04/2021 08:08, Michal Orzel wrote:
>> AArch64 system registers are 64bit whereas AArch32 ones
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
CNTx_CTL_MASK to return unsigned long instead of
unsigned int as ctl is now of type register_t.
Signed-off-by: Michal Orzel
---
Changes since v1:
-Add macro CNTFRQ_MASK
-Modify CNTx_CTL_MASK, CNTx_CTL_ENABLE, CNTx_CTL_PENDING to return ul
---
xen/arch/arm/time.c | 28
as it is no longer needed due to upper union being 64bit now.
Add 64bit padding in cpu_user_regs before spsr_el1
because offset of spsr_el1 must be a multiple of 8.
Signed-off-by: Michal Orzel
---
Changes since v1:
-Modify type of cpsr, spsr_el1
-Remove ifdefery in hsr union protecting _res0 members
-Fix
... as it is never used even in the patch introducing it.
Signed-off-by: Michal Orzel
---
xen/include/asm-arm/gic.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index ad0f7452d0..5069ab4aac 100644
--- a/xen/include/asm
/1_EL1 register.
Signed-off-by: Michal Orzel
---
Changes since v1:
-Remove hcr member of gic_v3 in a seperate patch
-Add macro GICC_IAR_INTID_MASK
-Remove explicit cast in favor of implicit cast
---
xen/arch/arm/gic-v3-lpi.c | 2 +-
xen/arch/arm/gic-v3.c | 98
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of FPCR, FPSR, FPEXC32_EL2 to register_t.
Signed-off-by: Michal Orzel
Reviewed-by: Julien Grall
---
xen/arch/arm/arm64/vfp.c| 12 ++--
xen
TVM_REG macro.
The final part will be to completely remove macros READ/WRITE_SYSREG32.
Michal Orzel (10):
arm64/vfp: Get rid of READ/WRITE_SYSREG32
arm/domain: Get rid of READ/WRITE_SYSREG32
arm: Modify type of actlr to register_t
arm/gic: Remove member hcr of structure gic_v3
arm/gic: Get
as they
only exist on arm32.
Signed-off-by: Michal Orzel
---
Changes since v1:
-Move modification of ACTLR into seperate patch
---
xen/arch/arm/domain.c| 18 +-
xen/include/asm-arm/domain.h | 2 +-
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/xen/arch/arm
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Signed-off-by: Michal Orzel
---
xen/arch/arm/domain.c| 2 +-
xen/include/asm-arm/domain.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of vtcr to register_t.
Signed-off-by: Michal Orzel
Reviewed-by: Julien Grall
---
xen/arch/arm/p2m.c | 8
xen/arch/arm/traps.c | 2 +-
2 files changed
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify accesses to CTR_EL0 to use READ/WRITE_SYSREG.
Signed-off-by: Michal Orzel
Reviewed-by: Julien Grall
---
xen/include/asm-arm/page.h | 4 ++--
1 file changed, 2
in head.S SCTLR_EL2_SET we are zeroing the upper
32bit half which is correct but referring to this sysreg
as 32bit is a latent bug because the top 32bit was not used
by Xen.
Signed-off-by: Michal Orzel
---
Changes since v1:
-Update commit message with SCTLR_EL2 analysis
---
xen/arch/arm/mm.c| 2
Hi Julien,
On 20.04.2021 15:37, Julien Grall wrote:
> Hi Michal,
>
> On 20/04/2021 08:08, Michal Orzel wrote:
>> AArch64 system registers are 64bit whereas AArch32 ones
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
Hi Julien,
On 27.04.2021 13:09, Julien Grall wrote:
> Hi Michal,
>
> On 27/04/2021 10:35, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
Hi Julien,
On 27.04.2021 11:59, Julien Grall wrote:
>
>
> On 27/04/2021 10:35, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/WRITE_SYS
Hi Julien,
On 27.04.2021 12:02, Julien Grall wrote:
>
>
> On 27/04/2021 10:35, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/WRITE_SYS
Hi Julien,
On 27.04.2021 11:45, Julien Grall wrote:
> Hi Michal,
>
> On 27/04/2021 10:35, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
Hi Julien,
On 27.04.2021 11:47, Julien Grall wrote:
> Hi Michal,
>
> On 27/04/2021 10:35, Michal Orzel wrote:
>> AArch64 registers are 64bit whereas AArch32 registers
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
TVM_REG macro.
The final part will be to completely remove macros READ/WRITE_SYSREG32.
Michal Orzel (10):
arm64/vfp: Get rid of READ/WRITE_SYSREG32
arm/domain: Get rid of READ/WRITE_SYSREG32
arm: Modify type of actlr to register_t
arm/gic: Remove member hcr of structure gic_v3
arm/gic: Get
32bit.
Signed-off-by: Michal Orzel
---
Changes since v2:
-Modify the commit message
---
xen/arch/arm/domain.c| 2 +-
xen/include/asm-arm/domain.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 621f518b83
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of FPCR, FPSR, FPEXC32_EL2 to register_t.
Signed-off-by: Michal Orzel
Reviewed-by: Julien Grall
---
xen/arch/arm/arm64/vfp.c| 12 ++--
xen
should be only accessed on ARMv7 as they were retrospectively dropped
on ARMv8.
Signed-off-by: Michal Orzel
---
Changes since v2:
-Modify the commit message
Changes since v1:
-Move modification of ACTLR into seperate patch
---
xen/arch/arm/domain.c| 18 +-
xen/include/asm
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of vtcr to register_t.
Signed-off-by: Michal Orzel
Reviewed-by: Julien Grall
---
xen/arch/arm/p2m.c | 8
xen/arch/arm/traps.c | 2 +-
2 files changed
/1_EL1 register as only the first 23-bits
of IAR contains the interrupt number. The rest are RES0.
Therefore, take the opportunity to mask the bits [23:31] as
they should be used for an IRQ number (we don't know how the top bits
will be used).
Signed-off-by: Michal Orzel
---
Changes since v2
* macros to return unsigned long instead of
unsigned int as ctl is now of type register_t.
Signed-off-by: Michal Orzel
Acked-by: Julien Grall
---
xen/arch/arm/time.c | 28 ++--
xen/arch/arm/vtimer.c | 10 +-
xen/include/asm-arm/domain.h| 2
... as it is never used even in the patch introducing it.
Signed-off-by: Michal Orzel
Acked-by: Julien Grall
---
xen/include/asm-arm/gic.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index ad0f7452d0..5069ab4aac
ic outside interface
"public/vm_event.h" to allow ABI compatibility between 32bit and 64bit.
Signed-off-by: Michal Orzel
---
Changes since v2:
-Remove _res0 members from structures inside hsr union
-Update commit message
-Modify type of cpsr to uint64_t in public/arch-arm.h
-Increment XEN_DOMC
will not yet use the top
32-bit.
There is also no change in behavior because arch/arm/arm64/head.S will
initialize SCTLR_EL2 to a sane value with the top 32-bit zeroed.
Signed-off-by: Michal Orzel
---
Changes since v2:
-Modify the commit message
Changes since v1:
-Update commit message
or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify accesses to CTR_EL0 to use READ/WRITE_SYSREG.
Signed-off-by: Michal Orzel
Reviewed-by: Julien Grall
---
xen/include/asm-arm/page.h | 4 ++--
1 file changed, 2
Hi Julien,
On 11.03.2021 11:34, Julien Grall wrote:
> Hi Michal,
>
> On 10/03/2021 06:58, Michal Orzel wrote:
>> Currently in order to link existing DTB into Xen image
>> we need to either specify option CONFIG_DTB_FILE on the
>> command line or manually add it into .c
On 11.03.2021 12:11, Julien Grall wrote:
>
>
> On 11/03/2021 10:41, Michal Orzel wrote:
>> Hi Julien,
>
> Hi,
>
>>
>> On 11.03.2021 11:34, Julien Grall wrote:
>>> Hi Michal,
>>>
>>> On 10/03/2021 06:58, Michal Orzel wrote:
>
On 11.03.2021 14:32, Julien Grall wrote:
> Hi,
>
> On 11/03/2021 13:10, Jan Beulich wrote:
>> On 11.03.2021 13:39, Michal Orzel wrote:
>>> On 11.03.2021 12:11, Julien Grall wrote:
>>>> On 11/03/2021 10:41, Michal Orzel wrote:
>>>>> On 11.03.2
n of _sdtb if there is no reference to it.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 5 ++---
xen/arch/arm/arm32/head.S | 4 ++--
xen/arch/arm/arm64/head.S | 4 ++--
xen/arch/arm/xen.lds.S| 2 +-
xen/common/Kconfig| 8
5 files changed, 15 insertions(+), 8 deletions(-)
to be executed.
arm32: No tests supported. Only compile time
support.
Signed-off-by: Michal Orzel
---
INSTALL| 18 ++
Makefile | 6 +-
README | 7 +
build/arm-common-files.mk | 14 ++
build/arm32/arch-common.mk | 8 +
build/arm32/arch
-by: Michal Orzel
---
.gitignore| 2 +-
Makefile | 19 ---
build/common.mk | 49 +++
build/gen.mk | 22 ++--
build/x86/arch-common.mk | 34
as it is a common declaration
for all the possible architectures.
-do not protect including
We should always include and rely
on the compiler to throw an error. This would avoid
increasing #if protection each time we would add
a new architecture.
Signed-off-by: Michal Orzel
---
arch/x86/include
modifying the existing
XTF design. This creates a base for further implementation.
Signed-off-by: Michal Orzel
Based-on-the-work-from: Julien Grall
---
arch/arm/arm32/head.S | 0
arch/arm/arm64/cache.S | 23 +++
arch/arm/arm64/head.S | 90
the
documentation. On arm64 one test is supported tests/example allowing
the startup code to be executed. On arm32 currently no test is supported.
Michal Orzel (4):
xtf: Perform misc code cleanup
build: Modify build system to support multiple architectures
arm: Add initial architecture code
n of _sdtb if there is no reference to it.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 5 ++---
xen/arch/arm/arm32/head.S | 4 ++--
xen/arch/arm/arm64/head.S | 4 ++--
xen/arch/arm/xen.lds.S| 4 +---
xen/common/Kconfig| 10 ++
5 files changed, 17 insertions(+), 10
n of _sdtb if there is no reference to it.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 5 ++---
xen/arch/arm/arm32/head.S | 4 ++--
xen/arch/arm/arm64/head.S | 4 ++--
xen/arch/arm/xen.lds.S| 4 +---
xen/common/Kconfig| 8
5 files changed, 15 insertions(+), 10 deletion
On 11.03.2021 15:50, Jan Beulich wrote:
> On 11.03.2021 15:22, Michal Orzel wrote:
>> Currently in order to link existing DTB into Xen image
>> we need to either specify option CONFIG_DTB_FILE on the
>> command line or manually add it into .config.
>> Add Kco
On 18.03.2021 10:20, Jan Beulich wrote:
> On 18.03.2021 08:21, Michal Orzel wrote:
>> Hi Julien,
>>
>> On 16.03.2021 15:54, Julien Grall wrote:
>>> Hi Michal,
>>>
>>> On 15/03/2021 09:23, Michal Orzel wrote:
>>>> Currently in orde
n a header
with all the other config options.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 5 +
xen/common/Kconfig| 8
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 16e6523e2c..d7702258f5 100644
--- a/xe
On 09.03.2021 11:22, Julien Grall wrote:
>
>
> On 09/03/2021 07:28, Michal Orzel wrote:
>>
>>
>> On 08.03.2021 15:26, Jan Beulich wrote:
>>> On 08.03.2021 14:59, Michal Orzel wrote:
>>>> --- a/xen/arch/arm/Makefile
>>>>
Hi,
On 09.03.2021 11:20, Julien Grall wrote:
>
>
> On 09/03/2021 07:34, Michal Orzel wrote:
>> Hi Julien,
>
> Hi,
>
>> On 08.03.2021 15:31, Julien Grall wrote:
>>> Hi,
>>>
>>> On 08/03/2021 13:59, Michal Orzel wrote:
>>>>
On 09.03.2021 14:32, Julien Grall wrote:
>
>
> On 09/03/2021 11:07, Jan Beulich wrote:
>> On 09.03.2021 11:20, Julien Grall wrote:
>>> On 09/03/2021 07:34, Michal Orzel wrote:
>>>> On 08.03.2021 15:31, Julien Grall wrote:
>>>>> On 08/03/20
e protects
_sdtb with #ifdef rather than with .ifnes. If the latter,
we will get a compiler error.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 5 ++---
xen/arch/arm/arm32/head.S | 4 ++--
xen/arch/arm/arm64/head.S | 4 ++--
xen/arch/arm/dtb.S| 1 +
xen/arch/arm/xen.lds
Hi Julien,
On 16.03.2021 15:54, Julien Grall wrote:
> Hi Michal,
>
> On 15/03/2021 09:23, Michal Orzel wrote:
>> Currently in order to link existing DTB into Xen image
>> we need to either specify option CONFIG_DTB_FILE on the
>> command line or manually add it into .c
On 09.03.2021 15:18, Jan Beulich wrote:
> On 09.03.2021 14:55, Michal Orzel wrote:
>>
>>
>> On 09.03.2021 14:32, Julien Grall wrote:
>>>
>>>
>>> On 09/03/2021 11:07, Jan Beulich wrote:
>>>> On 09.03.2021 11:20, Julie
will not be embedded.
Remove the line: AFLAGS-y += -DCONFIG_DTB_FILE=\"$(CONFIG_DTB_FILE)\"
as it is not needed since Kconfig will define it in a header
with all the other config options.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 5 ++---
xen/common/Kconfig| 8 +++
On 10.03.2021 14:36, Ian Jackson wrote:
> Julien Grall writes ("Re: [PATCH v4] arm: Add Kconfig entry to select
> CONFIG_DTB_FILE"):
>> I was under the impression that this patch would not target 4.15. At
>> least I didn't see any request for it.
>
> OK, good :-).
>
> Thanks,
> Ian.
>
So
Hi Jan,
On 08.03.2021 11:00, Jan Beulich wrote:
> On 08.03.2021 10:52, Michal Orzel wrote:
>> --- a/xen/common/Kconfig
>> +++ b/xen/common/Kconfig
>> @@ -400,6 +400,20 @@ config DOM0_MEM
>>
>>Leave empty if you are not sure what to specify.
>>
into Xen image.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 2 --
xen/common/Kconfig| 14 ++
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 16e6523e2c..104422960a 100644
--- a/xen/arch/arm/Makefile
+++ b
On 08.03.2021 14:13, Jan Beulich wrote:
> On 08.03.2021 14:11, Michal Orzel wrote:
>>
>>
>> On 08.03.2021 12:28, Jan Beulich wrote:
>>> On 08.03.2021 12:02, Michal Orzel wrote:
>>>> On 08.03.2021 11:00, Jan Beulich wrote:
>>>>> On 08.0
will not be embedded.
Signed-off-by: Michal Orzel
---
xen/arch/arm/Makefile | 4 +---
xen/common/Kconfig| 8
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 16e6523e2c..0f3e99d075 100644
--- a/xen/arch/arm/Makefile
+++ b
On 08.03.2021 12:28, Jan Beulich wrote:
> On 08.03.2021 12:02, Michal Orzel wrote:
>> On 08.03.2021 11:00, Jan Beulich wrote:
>>> On 08.03.2021 10:52, Michal Orzel wrote:
>>>> +config DTB_FILE
>>>> + string "Absolute path to device tree blob&
On 08.03.2021 15:26, Jan Beulich wrote:
> On 08.03.2021 14:59, Michal Orzel wrote:
>> --- a/xen/arch/arm/Makefile
>> +++ b/xen/arch/arm/Makefile
>> @@ -68,7 +68,7 @@ extra-y += $(TARGET_SUBARCH)/head.o
>>
>> #obj-bin-y += o
>>
>> -ifdef
Hi Julien,
On 08.03.2021 15:31, Julien Grall wrote:
> Hi,
>
> On 08/03/2021 13:59, Michal Orzel wrote:
>> Currently in order to link existing DTB into Xen image
>> we need to either specify option CONFIG_DTB_FILE on the
>> command line or manually add it into .c
ThumbEE(T32EE) was introduced in ARMv7 and removed in ARMv8.
In 2011 ARM deprecated any use of the ThumbEE instruction set.
This feature is untested and as per my understanding
there are no reported users for it.
Remove all the bits related to it.
Signed-off-by: Michal Orzel
---
xen/arch/arm
Hi Julien,
On 13.04.2021 11:07, Julien Grall wrote:
> Hi Michal,
>
> On 13/04/2021 09:24, Michal Orzel wrote:
>> ThumbEE(T32EE) was introduced in ARMv7 and removed in ARMv8.
>> In 2011 ARM deprecated any use of the ThumbEE instruction set.
>
> This doesn't mean thi
ive value.
>
> Take the opportunity to adjust the code style for the check.
>
> Signed-off-by: Julien Grall
>
> ---
> Changes in v2:
> - Fix build
> ---
Reviewed-by: Michal Orzel
On 13.04.2021 11:42, Julien Grall wrote:
>
>
> On 13/04/2021 10:32, Michal Orzel wrote:
>> Hi Julien,
>>
>> On 13.04.2021 11:07, Julien Grall wrote:
>>> Hi Michal,
>>>
>>> On 13/04/2021 09:24, Michal Orzel wrote:
>>>> ThumbEE
Hi Julien,
On 20.04.2021 15:12, Julien Grall wrote:
> Hi Michal,
>
> On 20/04/2021 08:08, Michal Orzel wrote:
>> AArch64 system registers are 64bit whereas AArch32 ones
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
Hi Julien,
On 20.04.2021 15:28, Julien Grall wrote:
> Hi Michal,
>
> On 20/04/2021 08:08, Michal Orzel wrote:
>> AArch64 system registers are 64bit whereas AArch32 ones
>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>> we should get rid of helpers READ/
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of vtcr to register_t.
Signed-off-by: Michal Orzel
---
xen/arch/arm/p2m.c | 8
xen/arch/arm/traps.c | 2 +-
2 files changed, 5 insertions(+), 5
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify SCTLR_EL2 accesses to use READ/WRITE_SYSREG.
Signed-off-by: Michal Orzel
---
xen/arch/arm/mm.c| 2 +-
xen/arch/arm/traps.c | 2 +-
2 files changed, 2 insertions
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of hsr to register_t.
When on AArch64 add 32bit RES0 members to structures inside hsr union.
Signed-off-by: Michal Orzel
---
xen/arch/arm/arm64/entry.S
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
As there are no other places in the code using READ/WRITE_SYSREG32,
remove the helper macros.
Signed-off-by: Michal Orzel
---
xen/arch/arm/vcpreg.c | 16
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify types of following members of struct gic_v3 to register_t:
-hcr(not used at all in Xen)
-vmcr
-sre_el1
-apr0
-apr1
Signed-off-by: Michal Orzel
---
xen/arch/arm/gic-v3
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of FPCR, FPSR, FPEXC32_EL2 to register_t.
Signed-off-by: Michal Orzel
---
xen/arch/arm/arm64/vfp.c| 12 ++--
xen/include/asm-arm/arm64/vfp.h | 6
on. They were not changed as they did not appear
inside READ/WRITE_SYSREG32. The next thing to do is to also get rid of
vreg_emulate_sysreg32.
Michal Orzel (9):
arm64/vfp: Get rid of READ/WRITE_SYSREG32
arm/domain: Get rid of READ/WRITE_SYSREG32
arm/gic: Get rid of READ/WRITE_SYSREG32
arm/p2m: Get
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of registers: actlr, cntkctl to register_t.
Signed-off-by: Michal Orzel
---
xen/arch/arm/domain.c| 20 ++--
xen/include/asm-arm/domain.h
or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of vtimer structure's member: ctl to register_t.
Signed-off-by: Michal Orzel
---
xen/arch/arm/time.c | 28 ++--
xen/arch/arm
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