encodings marked reserved, will cause a #GP fault.
Signed-off-by: Luwei Kang
---
xen/arch/x86/cpu/ipt.c | 110 +
1 file changed, 110 insertions(+)
diff --git a/xen/arch/x86/cpu/ipt.c b/xen/arch/x86/cpu/ipt.c
index dcb7a8d..fd75a01 100644
--- a/xen/arch
Introduce a new function to check if a specific capability
of Intel Processor Trace is exists.
Signed-off-by: Luwei Kang
---
xen/arch/x86/cpu/ipt.c| 63 +++
xen/include/asm-x86/ipt.h | 19 ++
2 files changed, 82 insertions(+)
diff
Load/Restore Intel Processor Trace Register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS.
When Intel Processor Trace is supported in guest, we need
to load/restore MSRs only when this feature is enabled
in guest.
Signed-off-by: Luwei Kang
---
xen/arch/x86/cpu
overlap with 4KB APIC MMIO region as
defined by the IA32_APIC_BASE (SDM 35.2.6.4) but no error for this
case in hardware. Crash guest in hypervisor.
Signed-off-by: Luwei Kang
---
xen/arch/x86/hvm/hvm.c| 8 ++--
xen/arch/x86/hvm/vmx/vmx.c| 5 +
xen/include/asm-x86/hvm/vmx
This patch add a new flag to enable Intel Processor Trace
in HVM guest by add parameter 'ipt = guest' in XEN
command line. Intel Processor Trace is disabled
in default.
Signed-off-by: Luwei Kang
---
docs/misc/xen-command-line.markdown | 10 +
xen/arch/x86/cpu/Makefile | 1
is available in hardware or this feature is
disabled by user.
Signed-off-by: Luwei Kang
---
xen/arch/x86/hvm/vmx/vmcs.c| 37 -
xen/include/asm-x86/hvm/vmx/vmcs.h | 7 +++
2 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx
Add Intel Processor Trace MSRs read/write emulation.
If Intel Processor Trace is not supported in guest,
access not supported MSRs or access reserved bits,
a #GP will be injected to guest.
Signed-off-by: Luwei Kang
---
xen/arch/x86/cpu/ipt.c | 108
-off-by: Luwei Kang
---
xen/arch/x86/hvm/vmx/vvmx.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index e97db33..30c7876 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -26,6
Add Intel Processor Trace MSRs and bit definitions.
Signed-off-by: Luwei Kang
---
xen/include/asm-x86/msr-index.h | 37 +
1 file changed, 37 insertions(+)
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 8fbccc8..7c02653
Intel Processor Trace will be disabled in guest
when ipt_mode is off (IPT_MODE_OFF).
Signed-off-by: Luwei Kang
---
tools/libxc/xc_cpuid_x86.c | 12 ++--
xen/arch/x86/cpuid.c| 22 ++
xen/arch/x86/domctl.c
rospection handler in this version.
Luwei Kang (10):
x86: add an flag to enable Intel Processor Trace in guest
x86: Configure VMCS for Intel Processor Trace virtualization
x86: Add Intel Processor Trace support for cpuid
x86: Add Intel Processor Trace MSRs and bit definitions
x86: Imple
-off-by: Luwei Kang <luwei.k...@intel.com>
---
xen/arch/x86/hvm/vmx/vvmx.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index 885eab3..86ccfda 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/h
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
xen/arch/x86/hvm/vmx/vmcs.c| 36 +++-
xen/include/asm-x86/hvm/vmx/vmcs.h | 7 +++
2 files changed, 38 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs
This patch add Intel processor trace support
for cpuid handling.
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
tools/libxc/xc_cpuid_x86.c | 12 ++--
xen/arch/x86/cpuid.c| 22 ++
xen/arch/x86/do
Load/Store Intel processor trace register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS.
When Intel PT is supported in guest, we need load/restore
PT MSRs only when PT is enabled in guest.
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
xen/arch/x
Intel PT MSRs read/write will not be intercepted when guest enabled
Intel PT. IA32_RTIT_CTL read/write will always cause a VM-Exit.
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
xen/arch/x86/cpu/intel_pt.c| 101 +
xen/arch/x86/hvm/vmx
This patch add a flag to enable Intel PT (Intel processor trace).
Default value is 1 (enabled).
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
docs/misc/xen-command-line.markdown | 7 +++
xen/arch/x86/cpu/Makefile | 1 +
xen/arch/x86/cpu/intel_pt.c
, and other output events.
===
Do some optimization in context switch compared with the first sent:
1. disable intercept only when PT is enabled in guest;
2. disable Intel PT and enable intercept MSRs when L1 guest VMXON;
Luwei Kang (7):
x86: add a flag to enable Intel processor trace
x86
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