Re: [Xen-devel] [PATCH for-next 2/7] x86: fix up hyperv-tlfs.h

2019-12-11 Thread Wei Liu
On Tue, Dec 10, 2019 at 04:35:41PM +0100, Jan Beulich wrote:
> On 25.10.2019 11:16, Wei Liu wrote:
> > Do the following:
> > 1. include xen/types.h and xen/bitops.h
> > 2. fix up invocations of BIT macro
> 
> Is it truly BIT(..., UL) in _all_ cases, and not BIT(..., U) in some?

In Linux BIT is 

   #define BIT(nr) (UL(1) << nr)

so yes Linux developers did mean UL everywhere.

I haven't checked them one by one per TLFS's definitions though.

Wei.

> 
> > Signed-off-by: Wei Liu 
> > ---
> > This can be squashed into previous patch if preferred.
> 
> Afaic - yes please.
> 
> Jan

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Re: [Xen-devel] [PATCH for-next 2/7] x86: fix up hyperv-tlfs.h

2019-12-10 Thread Jan Beulich
On 25.10.2019 11:16, Wei Liu wrote:
> Do the following:
> 1. include xen/types.h and xen/bitops.h
> 2. fix up invocations of BIT macro

Is it truly BIT(..., UL) in _all_ cases, and not BIT(..., U) in some?

> Signed-off-by: Wei Liu 
> ---
> This can be squashed into previous patch if preferred.

Afaic - yes please.

Jan

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[Xen-devel] [PATCH for-next 2/7] x86: fix up hyperv-tlfs.h

2019-10-25 Thread Wei Liu
Do the following:
1. include xen/types.h and xen/bitops.h
2. fix up invocations of BIT macro

Signed-off-by: Wei Liu 
---
This can be squashed into previous patch if preferred.
---
 xen/include/asm-x86/guest/hyperv-tlfs.h | 141 
 1 file changed, 71 insertions(+), 70 deletions(-)

diff --git a/xen/include/asm-x86/guest/hyperv-tlfs.h 
b/xen/include/asm-x86/guest/hyperv-tlfs.h
index 7741e211f7..ccd9850b27 100644
--- a/xen/include/asm-x86/guest/hyperv-tlfs.h
+++ b/xen/include/asm-x86/guest/hyperv-tlfs.h
@@ -9,7 +9,8 @@
 #ifndef _ASM_X86_HYPERV_TLFS_H
 #define _ASM_X86_HYPERV_TLFS_H
 
-#include 
+#include 
+#include 
 #include 
 
 /*
@@ -19,7 +20,7 @@
  * size may not be 4096 on all architectures.
  */
 #define HV_HYP_PAGE_SHIFT  12
-#define HV_HYP_PAGE_SIZE   BIT(HV_HYP_PAGE_SHIFT)
+#define HV_HYP_PAGE_SIZE   BIT(HV_HYP_PAGE_SHIFT, UL)
 #define HV_HYP_PAGE_MASK   (~(HV_HYP_PAGE_SIZE - 1))
 
 /*
@@ -45,47 +46,47 @@
  */
 
 /* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */
-#define HV_X64_MSR_VP_RUNTIME_AVAILABLEBIT(0)
+#define HV_X64_MSR_VP_RUNTIME_AVAILABLEBIT(0, UL)
 /* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
-#define HV_MSR_TIME_REF_COUNT_AVAILABLEBIT(1)
+#define HV_MSR_TIME_REF_COUNT_AVAILABLEBIT(1, UL)
 /*
  * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
  * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
  */
-#define HV_X64_MSR_SYNIC_AVAILABLE BIT(2)
+#define HV_X64_MSR_SYNIC_AVAILABLE BIT(2, UL)
 /*
  * Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through
  * HV_X64_MSR_STIMER3_COUNT) available
  */
-#define HV_MSR_SYNTIMER_AVAILABLE  BIT(3)
+#define HV_MSR_SYNTIMER_AVAILABLE  BIT(3, UL)
 /*
  * APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
  * are available
  */
-#define HV_X64_MSR_APIC_ACCESS_AVAILABLE   BIT(4)
+#define HV_X64_MSR_APIC_ACCESS_AVAILABLE   BIT(4, UL)
 /* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) available*/
-#define HV_X64_MSR_HYPERCALL_AVAILABLE BIT(5)
+#define HV_X64_MSR_HYPERCALL_AVAILABLE BIT(5, UL)
 /* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/
-#define HV_X64_MSR_VP_INDEX_AVAILABLE  BIT(6)
+#define HV_X64_MSR_VP_INDEX_AVAILABLE  BIT(6, UL)
 /* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/
-#define HV_X64_MSR_RESET_AVAILABLE BIT(7)
+#define HV_X64_MSR_RESET_AVAILABLE BIT(7, UL)
 /*
  * Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE,
  * HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_PAGE,
  * HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available
  */
-#define HV_X64_MSR_STAT_PAGES_AVAILABLEBIT(8)
+#define HV_X64_MSR_STAT_PAGES_AVAILABLEBIT(8, UL)
 /* Partition reference TSC MSR is available */
-#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9)
+#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9, UL)
 /* Partition Guest IDLE MSR is available */
-#define HV_X64_MSR_GUEST_IDLE_AVAILABLEBIT(10)
+#define HV_X64_MSR_GUEST_IDLE_AVAILABLEBIT(10, UL)
 /*
  * There is a single feature flag that signifies if the partition has access
  * to MSRs with local APIC and TSC frequencies.
  */
-#define HV_X64_ACCESS_FREQUENCY_MSRS   BIT(11)
+#define HV_X64_ACCESS_FREQUENCY_MSRS   BIT(11, UL)
 /* AccessReenlightenmentControls privilege */
-#define HV_X64_ACCESS_REENLIGHTENMENT  BIT(13)
+#define HV_X64_ACCESS_REENLIGHTENMENT  BIT(13, UL)
 
 /*
  * Feature identification: indicates which flags were specified at partition
@@ -93,17 +94,17 @@
  * defined in section Partition Creation Flags.
  * These are HYPERV_CPUID_FEATURES.EBX bits.
  */
-#define HV_X64_CREATE_PARTITIONS   BIT(0)
-#define HV_X64_ACCESS_PARTITION_ID BIT(1)
-#define HV_X64_ACCESS_MEMORY_POOL  BIT(2)
-#define HV_X64_ADJUST_MESSAGE_BUFFERS  BIT(3)
-#define HV_X64_POST_MESSAGES   BIT(4)
-#define HV_X64_SIGNAL_EVENTS   BIT(5)
-#define HV_X64_CREATE_PORT BIT(6)
-#define HV_X64_CONNECT_PORTBIT(7)
-#define HV_X64_ACCESS_STATSBIT(8)
-#define HV_X64_DEBUGGING   BIT(11)
-#define HV_X64_CPU_POWER_MANAGEMENTBIT(12)
+#define HV_X64_CREATE_PARTITIONS   BIT(0, UL)
+#define HV_X64_ACCESS_PARTITION_ID BIT(1, UL)
+#define HV_X64_ACCESS_MEMORY_POOL  BIT(2, UL)
+#define HV_X64_ADJUST_MESSAGE_BUFFERS  BIT(3, UL)
+#define HV_X64_POST_MESSAGES   BIT(4, UL)
+#define HV_X64_SIGNAL_EVENTS   BIT(5, UL)
+#define HV_X64_CREATE_PORT BIT(6, UL)
+#define HV_X64_CONNECT_PORTBIT(7, UL)
+#define