On 03/04/18 09:14, Juergen Gross wrote:
> On 29/03/18 17:37, Jan Beulich wrote:
> On 29.03.18 at 17:15, wrote:
>>> On 29/03/18 16:19, Jan Beulich wrote:
>>> On 27.03.18 at 11:07, wrote:
> @@ -102,7 +103,21 @@ void write_cr3_cr4(unsigned long cr3,
On 29/03/18 17:37, Jan Beulich wrote:
On 29.03.18 at 17:15, wrote:
>> On 29/03/18 16:19, Jan Beulich wrote:
>> On 27.03.18 at 11:07, wrote:
@@ -102,7 +103,21 @@ void write_cr3_cr4(unsigned long cr3, unsigned long
cr4)
t =
>>> On 29.03.18 at 17:15, wrote:
> On 29/03/18 16:19, Jan Beulich wrote:
> On 27.03.18 at 11:07, wrote:
>>> @@ -102,7 +103,21 @@ void write_cr3_cr4(unsigned long cr3, unsigned long
>>> cr4)
>>> t = pre_flush();
>>>
>>> if ( read_cr4() &
On 29/03/18 16:19, Jan Beulich wrote:
On 27.03.18 at 11:07, wrote:
>> --- a/xen/arch/x86/domain_page.c
>> +++ b/xen/arch/x86/domain_page.c
>> @@ -51,7 +51,7 @@ static inline struct vcpu *mapcache_current_vcpu(void)
>> if ( (v = idle_vcpu[smp_processor_id()]) ==
>>> On 27.03.18 at 11:07, wrote:
> --- a/xen/arch/x86/domain_page.c
> +++ b/xen/arch/x86/domain_page.c
> @@ -51,7 +51,7 @@ static inline struct vcpu *mapcache_current_vcpu(void)
> if ( (v = idle_vcpu[smp_processor_id()]) == current )
>
Avoid flushing the complete TLB when switching %cr3 for mitigation of
Meltdown by using the PCID feature if available.
We are using 4 PCID values for a 64 bit pv domain subject to XPTI and
2 values for the non-XPTI case:
- guest active and in kernel mode
- guest active and in user mode
-