Re: [Xen-devel] [PATCH v5 11/18] xen/arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

2018-02-26 Thread Andre Przywara
Hi, On 23/02/18 18:57, Julien Grall wrote: > Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. > > Signed-off-by: Julien Grall Thanks, that looks good now: Reviewed-by: Andre Przywara Cheers, Andre. > --- > Changes in v5: > - Fold the fixup! patch which re-orde

Re: [Xen-devel] [PATCH v5 11/18] xen/arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

2018-02-23 Thread Stefano Stabellini
On Fri, 23 Feb 2018, Julien Grall wrote: > Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. > > Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini > --- > Changes in v5: > - Fold the fixup! patch which re-order registers into it. > > Changes in v4:

Re: [Xen-devel] [PATCH v5 11/18] xen/arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

2018-02-23 Thread Volodymyr Babchuk
Julien, Looks good now On 23.02.18 20:57, Julien Grall wrote: Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- Changes in v5: - Fold the fixup! patch which re-order registers into it. Cha

[Xen-devel] [PATCH v5 11/18] xen/arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

2018-02-23 Thread Julien Grall
Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. Signed-off-by: Julien Grall --- Changes in v5: - Fold the fixup! patch which re-order registers into it. Changes in v4: - Re-order saving/restoring registers in __smccc_workaround_1_smc_start