Re: [Xen-devel] [PATCH 1/2] x86/hvm: Correct the position of the %cs L/D checks

2016-10-14 Thread Konrad Rzeszutek Wilk
On Fri, Oct 14, 2016 at 11:06:55AM +0100, Andrew Cooper wrote:
> Contrary to the description in the software manuals, in Long Mode, attempts to
> load %cs check that D is not set in combination with L before the present flag
> is checked.
> 
> This can be observed because the L/D check fails with #GP before the presence
> check failes with #NP

CC-ing Paul and Sherry.

Perhaps the SDMs should mention this as well?

> 
> Signed-off-by: Andrew Cooper 
> ---
> CC: Jan Beulich 
> ---
>  xen/arch/x86/x86_emulate/x86_emulate.c | 13 -
>  1 file changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
> b/xen/arch/x86/x86_emulate/x86_emulate.c
> index 793ce30..b23cd99 100644
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -1405,6 +1405,14 @@ protmode_load_seg(
> /* Non-conforming segment: check RPL and DPL against CPL. */
> : rpl > cpl || dpl != cpl )
>  goto raise_exn;
> +/*
> + * 64-bit code segments (L bit set) must have D bit clear.
> + * Experimentally in long mode, the L and D bits are checked before
> + * the Present bit.
> + */
> +if ( in_longmode(ctxt, ops) &&
> + (desc.b & (1 << 21)) && (desc.b & (1 << 22)) )
> +goto raise_exn;
>  sel = (sel ^ rpl) | cpl;
>  break;
>  case x86_seg_ss:
> @@ -1444,11 +1452,6 @@ protmode_load_seg(
>  goto raise_exn;
>  }
>  
> -/* 64-bit code segments (L bit set) must have D bit clear. */
> -if ( seg == x86_seg_cs && in_longmode(ctxt, ops) &&
> - (desc.b & (1 << 21)) && (desc.b & (1 << 22)) )
> -goto raise_exn;
> -
>  /* Ensure Accessed flag is set. */
>  if ( a_flag && !(desc.b & a_flag) )
>  {
> -- 
> 2.1.4
> 
> 
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Re: [Xen-devel] [PATCH 1/2] x86/hvm: Correct the position of the %cs L/D checks

2016-10-14 Thread Andrew Cooper
On 14/10/16 11:28, Jan Beulich wrote:
 On 14.10.16 at 12:06,  wrote:
>> Contrary to the description in the software manuals, in Long Mode, attempts 
>> to
>> load %cs check that D is not set in combination with L before the present 
>> flag
>> is checked.
>>
>> This can be observed because the L/D check fails with #GP before the presence
>> check failes with #NP
>>
>> Signed-off-by: Andrew Cooper 
> Reviewed-by: Jan Beulich 
>
> But I think it would be worthwhile mentioning that this restores
> things to v1 of what became commit 78ff18c90.

I will update the comment to include this.

~Andrew

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Re: [Xen-devel] [PATCH 1/2] x86/hvm: Correct the position of the %cs L/D checks

2016-10-14 Thread Jan Beulich
>>> On 14.10.16 at 12:06,  wrote:
> Contrary to the description in the software manuals, in Long Mode, attempts to
> load %cs check that D is not set in combination with L before the present flag
> is checked.
> 
> This can be observed because the L/D check fails with #GP before the presence
> check failes with #NP
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 

But I think it would be worthwhile mentioning that this restores
things to v1 of what became commit 78ff18c90.

Jan

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[Xen-devel] [PATCH 1/2] x86/hvm: Correct the position of the %cs L/D checks

2016-10-14 Thread Andrew Cooper
Contrary to the description in the software manuals, in Long Mode, attempts to
load %cs check that D is not set in combination with L before the present flag
is checked.

This can be observed because the L/D check fails with #GP before the presence
check failes with #NP

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 13 -
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
b/xen/arch/x86/x86_emulate/x86_emulate.c
index 793ce30..b23cd99 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1405,6 +1405,14 @@ protmode_load_seg(
/* Non-conforming segment: check RPL and DPL against CPL. */
: rpl > cpl || dpl != cpl )
 goto raise_exn;
+/*
+ * 64-bit code segments (L bit set) must have D bit clear.
+ * Experimentally in long mode, the L and D bits are checked before
+ * the Present bit.
+ */
+if ( in_longmode(ctxt, ops) &&
+ (desc.b & (1 << 21)) && (desc.b & (1 << 22)) )
+goto raise_exn;
 sel = (sel ^ rpl) | cpl;
 break;
 case x86_seg_ss:
@@ -1444,11 +1452,6 @@ protmode_load_seg(
 goto raise_exn;
 }
 
-/* 64-bit code segments (L bit set) must have D bit clear. */
-if ( seg == x86_seg_cs && in_longmode(ctxt, ops) &&
- (desc.b & (1 << 21)) && (desc.b & (1 << 22)) )
-goto raise_exn;
-
 /* Ensure Accessed flag is set. */
 if ( a_flag && !(desc.b & a_flag) )
 {
-- 
2.1.4


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