Re: [Xen-devel] [PATCH v2 2/6] x86/xpti: don't flush TLB twice when switching to 64-bit pv context

>>> On 02.03.18 at 09:13, wrote: > @@ -509,9 +510,16 @@ void make_cr3(struct vcpu *v, mfn_t mfn) > > void write_ptbase(struct vcpu *v) > { > -get_cpu_info()->root_pgt_changed = this_cpu(root_pgt) && is_pv_vcpu(v) && > -

[Xen-devel] [PATCH v2 2/6] x86/xpti: don't flush TLB twice when switching to 64-bit pv context

When switching to a 64-bit pv context the TLB is flushed twice today: the first time when switching to the new address space in write_ptbase(), the second time when switching to guest mode in restore_to_guest. Avoid the first TLB flush in that case. Signed-off-by: Juergen Gross