Re: [Xen-devel] [PATCH] x86/spec_ctrl: Fix several bugs in SPEC_CTRL_ENTRY_FROM_INTR_IST
On 14/02/18 11:47, Roger Pau Monné wrote: > >> diff --git a/xen/include/asm-x86/spec_ctrl_asm.h >> b/xen/include/asm-x86/spec_ctrl_asm.h >> index 814f53d..1f78599 100644 >> --- a/xen/include/asm-x86/spec_ctrl_asm.h >> +++ b/xen/include/asm-x86/spec_ctrl_asm.h >> @@ -79,10 +79,10 @@ >> * - SPEC_CTRL_EXIT_TO_GUEST >> */ >> >> -.macro DO_OVERWRITE_RSB >> +.macro DO_OVERWRITE_RSB tmp=%rax >> /* >> * Requires nothing >> - * Clobbers %rax, %rcx >> + * Clobbers \tmp (%rax by default), %rcx > Is it worth changing %rcx to %ecx here... No, because a mov to %ecx clobbers %rcx. I'll adjust the comment. ~Andrew ___ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
Re: [Xen-devel] [PATCH] x86/spec_ctrl: Fix several bugs in SPEC_CTRL_ENTRY_FROM_INTR_IST
On Wed, Feb 14, 2018 at 11:10:55AM +, Andrew Cooper wrote: > DO_OVERWRITE_RSB clobbers %rax, meaning in practice that that the bti_ist_info > field gets zeroed. Older versions of this code had the DO_OVERWRITE_RSB > register selectable, so reintroduce this ability and use it to cause the > INTR_IST path to use %rdx instead. > > The use of %dl for the %cs.rpl check means that when an IST interrupt hits > Xen, we try to load 1 into the high 32 bits of MSR_SPEC_CTRL, suffering a #GP > fault instead. > > Also, drop an unused label which was a copy/paste mistake. > > Reported-by: Boris Ostrovsky > Reported-by: Zhenzhong Duan > Signed-off-by: Andrew Cooper Reviewed-by: Wei Liu ___ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
Re: [Xen-devel] [PATCH] x86/spec_ctrl: Fix several bugs in SPEC_CTRL_ENTRY_FROM_INTR_IST
On Wed, Feb 14, 2018 at 11:10:55AM +, Andrew Cooper wrote: > DO_OVERWRITE_RSB clobbers %rax, meaning in practice that that the bti_ist_info ^dup > field gets zeroed. Older versions of this code had the DO_OVERWRITE_RSB > register selectable, so reintroduce this ability and use it to cause the > INTR_IST path to use %rdx instead. > > The use of %dl for the %cs.rpl check means that when an IST interrupt hits > Xen, we try to load 1 into the high 32 bits of MSR_SPEC_CTRL, suffering a #GP > fault instead. > > Also, drop an unused label which was a copy/paste mistake. > > Reported-by: Boris Ostrovsky > Reported-by: Zhenzhong Duan > Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné > --- > CC: Jan Beulich > CC: Zhenzhong Duan > CC: Boris Ostrovsky > CC: Wei Liu > CC: Roger Pau Monné > --- > xen/include/asm-x86/spec_ctrl_asm.h | 12 ++-- > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/xen/include/asm-x86/spec_ctrl_asm.h > b/xen/include/asm-x86/spec_ctrl_asm.h > index 814f53d..1f78599 100644 > --- a/xen/include/asm-x86/spec_ctrl_asm.h > +++ b/xen/include/asm-x86/spec_ctrl_asm.h > @@ -79,10 +79,10 @@ > * - SPEC_CTRL_EXIT_TO_GUEST > */ > > -.macro DO_OVERWRITE_RSB > +.macro DO_OVERWRITE_RSB tmp=%rax > /* > * Requires nothing > - * Clobbers %rax, %rcx > + * Clobbers \tmp (%rax by default), %rcx Is it worth changing %rcx to %ecx here... > * > * Requires 256 bytes of stack space, but %rsp has no net change. Based on > * Google's performance numbers, the loop is unrolled to 16 iterations and > two > @@ -97,7 +97,7 @@ > * optimised with mov-elimination in modern cores. > */ > mov $16, %ecx /* 16 iterations, two calls per loop */ > -mov %rsp, %rax /* Store the current %rsp */ > +mov %rsp, \tmp /* Store the current %rsp */ > > .L\@_fill_rsb_loop: > > @@ -114,7 +114,7 @@ > > sub $1, %ecx > jnz .L\@_fill_rsb_loop > -mov %rax, %rsp /* Restore old %rsp */ > +mov \tmp, %rsp /* Restore old %rsp */ > .endm > > .macro DO_SPEC_CTRL_ENTRY_FROM_VMEXIT ibrs_val:req > @@ -274,7 +274,7 @@ > testb $BTI_IST_RSB, %al > jz .L\@_skip_rsb > > -DO_OVERWRITE_RSB > +DO_OVERWRITE_RSB tmp=%rdx /* Clobbers %ecx/%rdx */ ... to match the comment here? Thanks, Roger. ___ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
Re: [Xen-devel] [PATCH] x86/spec_ctrl: Fix several bugs in SPEC_CTRL_ENTRY_FROM_INTR_IST
>>> On 14.02.18 at 12:10, wrote: > DO_OVERWRITE_RSB clobbers %rax, meaning in practice that that the bti_ist_info > field gets zeroed. Older versions of this code had the DO_OVERWRITE_RSB > register selectable, so reintroduce this ability and use it to cause the > INTR_IST path to use %rdx instead. > > The use of %dl for the %cs.rpl check means that when an IST interrupt hits > Xen, we try to load 1 into the high 32 bits of MSR_SPEC_CTRL, suffering a #GP > fault instead. > > Also, drop an unused label which was a copy/paste mistake. > > Reported-by: Boris Ostrovsky > Reported-by: Zhenzhong Duan > Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich with one remark/suggestion: > --- a/xen/include/asm-x86/spec_ctrl_asm.h > +++ b/xen/include/asm-x86/spec_ctrl_asm.h > @@ -79,10 +79,10 @@ > * - SPEC_CTRL_EXIT_TO_GUEST > */ > > -.macro DO_OVERWRITE_RSB > +.macro DO_OVERWRITE_RSB tmp=%rax If only registers are supposed to be passed as macro arguments, I generally consider it better to leave specifying at least the % to the macro body - that way nothing else (like a memory operand, perhaps referencing %rsp in a dangerous way) can be passed, as the assembler will choke on invalid names following %. In order to have the flexibility to also use the 32-bit register name inside the macro, I would also generally omit the r (but this is less of a concern here, as it's quite unlikely for the 32-bit name to be needed). Jan Jan ___ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel