Hi, Tristan
Le Vendredi 23 Juin 2006 13:15, Akio Takebe a 馗rit :
Hi, Tristan
GET_THIS_PADDR translate from only per_cpu virtual address
to per_cpu physcal address.
Yes.
per_cpu address is in TLB.
Is it true even within MCA handler ?
Yes, TR is unchanged by SAL/PAL when INIT is occerred.
I was hoping to enable xencons as the default console, but I've run
into a problem. I have a system that has the console UART and core I/O
NIC sharing the same interrupt (both are PCI devices). The
ia64_xen_vector bit array does not prevent the guest from writing the
IOSAPIC RTE value
Hi Kevin,
On Mon, 2006-06-26 at 10:25 +0800, Tian, Kevin wrote:
Hi, Alex,
Currently xen irq subsystem doesn't support PCI device to be
shared between xen and dom0. For example, easy to find some check
against this scenario like in pirq_guest_bind.
It easy to fix above
From: Alex Williamson [mailto:[EMAIL PROTECTED]
Sent: 2006年6月26日 10:54
It easy to fix above checks, like to add an IRQ_BOTH flag on top
of IRQ_GUEST to allow such a case. However the real issue is that full
PCI knowledge is owned by dom0 instead of xen. To let xen allocate
resources for
On Mon, 2006-06-26 at 11:27 +0800, Tian, Kevin wrote:
I seem to understand your proposal now. Do you mean that some early
table will report the irq line information for the console device out of the
ACPI table?
Hi Kevin,
Yes, the PCDP firmware table tells us all the details of the
