RE: [Xen-ia64-devel] Where are DTR6 and DTRA defined and set?

[Xu, Anthony]

Basically Isaku is correct,
I suppose you are using Montecito, there are two threads per core.
These two threads share TLB cache.

There is a field tid in TLB entry to identify which thread this TLb
entry belongs to.

Usually 
TLB entry #0 belongs to thread 0
TLB entry #1 belongs to thread 1
TLB entry #2 belongs to thread 0
TLB entry #3 belongs to thread 1
And so on.


- Anthony

Isaku Yamahata wrote:
 I guess the LSB 1 bit is used for thread id or something else.
 Does the processor support threading?
 
 On Sat, May 31, 2008 at 12:11:49PM +0900, Isaku Yamahata wrote:
 Hi.
 
 Hmm, although I haven't ever used hw probe, it looks like that
 those indexes you reported are left shifted by one.
 Could you check the manual of your hardware probe?
 
 For VTi guest, Xen surely uses KENREL, PERCPU_DATA,
 (CURRENT_STACK if the stack isn't mapped by KERNEL), MAPPED_REGS and
 VHPT. So DTR0, 1, 2, 3, 5 should be valid.
 By shifting left them by one, we get 0, 2, 4, 6, A.
 Those are which you reported.
 
 thanks,
 
 On Fri, May 30, 2008 at 02:24:29PM -0700, Paul Leisy wrote:
 Greetings,
 
 Using a hardware probe while running an HVM guest, I examined
 the Data TLB to see what TRs Xen had setup. It showed that
 DTR0,2,4,6,A were valid. Searching the Xen source code, I found
 these defined: 
 
 DTR0 = IA64_TR_KERNEL
 DTR1 = IA64_TR_PERCPU_DATA
 DTR2 = IA64_TR_CURRENT_STACK
 DTR3 = IA64_TR_MAPPED_REGS
 DTR4 = IA64_TR_SHARED_INFO
 DTR5 = IA64_TR_VHPT
 
 But these were not found:
 DTR6 = 
 DTRA = 
 
 Can someone tell me where these DTRs are defined and
 what code sets them up?
 
 Thanks,
 -Paul Leisy
 
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[Xen-ia64-devel] Xen/IPF Unstable CS#17766 Status Report --- no new issue

[Zhang, Jingke]

Hi all,
   All the cases passed in this Cset.   


Detail Xen/IA64 Unstable Cset #17766 Status Report

Test Result Summary:
# total case:   17
# passed case: 17
# failed case:   0

Testing Environment:
platform: Tiger4
processor: Itanium 2 Processor
logic Processors number: 8 (2 processors with Dual Core)
pal version: 9.08
service os: RHEL4u3 IA64 SMP with 2 VCPUs
vti guest os: RHEL4u2  RHEL4u3
xenU guest os: RHEL4u2
xen ia64 unstable tree: 17766
xen schedule: credit
gfw: open guest firmware Cset#122

Detailed Test Results:

Passed case Summary Description
SaveRestoreSaveRestore
VTI_PV  Linux VTI PV
Two_UP_VTI_Co2  UP_VTI (mem=256)
One_UP_VTI 1 UP_VTI (mem=256)
One_UP_XenU 1 UP_xenU(mem=256)
SMPVTI_LTP  VTI (vcpus=4, mem=512) run LTP
SMPVTI_and_SMPXenU  1 VTI + 1 xenU (mem=256 vcpus=2)
Two_SMPXenU_Coexist 2 xenU (mem=256, vcpus=2)
One_SMPVTI_4096M1 VTI (vcpus=2, mem=4096M)
SMPVTI_Network  1 VTI (mem=256,vcpu=2) and'ping'
SMPXenU_Network 1 XenU (vcpus=2) and 'ping'
One_SMP_XenU1 SMP xenU (vcpus=2)
One_SMP_VTI 1 SMP VTI (vcpus=2)
SMPVTI_Kernel_Build VTI (vcpus=4) and do KernelBuild
UPVTI_Kernel_Build  1 UP VTI and do kernel build
SMPVTI_Windows  SMPVTI windows(vcpu=2)
SMPWin_SMPVTI_SMPxenU   SMPVTI Linux/Windows  XenU 
---

Failed case id  Description



Thanks,
Zhang Jingke


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