Re: [Xen-ia64-devel] A patch to fix mis-setting ed bit for itlb entry.

2009-01-04 Thread Isaku Yamahata 
applied, thanks.

On Sun, Jan 04, 2009 at 03:22:06PM +0800, Zhang, Xiantao wrote:
 Hi, Isaku 
 When debugging  a windows BSOD issue,  we found it is caused by 
 mis-setting pte's ED bit for itlb entry.  For hash vTLB, it uses unified tlb 
 and doesn't differentiate itc and dtc in its implementation, so itlb_miss 
 handler may reference dtlb entry in hash vTLB.  But it may result in issues, 
 because dtlb's ED bit may be different with itlb's setting.  Since the case 
 is very rare, so just purge the corresponding entry in hash vTLB and let 
 guest OS to determin how to set ED bit for itlb mapping once found it. 
 Xiantao
 
 Signed-off-by : Xiantao Zhang xiantao.zh...@intel.com
 
 diff -r e97216802360 xen/arch/ia64/vmx/vtlb.c
 --- a/xen/arch/ia64/vmx/vtlb.c  Fri Dec 12 10:43:39 2008 +0900
 +++ b/xen/arch/ia64/vmx/vtlb.c  Sun Jan 04 10:43:19 2009 +0800
 @@ -678,11 +678,20 @@ thash_data_t *vtlb_lookup(VCPU *v, u64 v
  cch = vtlb_thash(hcb-pta, va, vrr.rrval, tag);
  do {
  if (cch-etag == tag  cch-ps == ps)
 -return cch;
 +goto found;
  cch = cch-next;
  } while(cch);
  }
  return NULL;
 +found:
 +if (is_data == ISIDE_TLB  !cch-ed) {
 +  /*The case is very rare, and it may lead to incorrect setting
 +  for itlb's ed bit! Purge it from hash vTLB and let guest os
 +  determin the ed bit of the itlb entry.*/
 +   vtlb_purge(v, va, ps);
 +   cch = NULL;
 +}
 +return cch;
  }

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yamahata

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[Xen-ia64-devel] A patch to fix mis-setting ed bit for itlb entry.

2009-01-03 Thread Zhang, Xiantao 
Hi, Isaku 
When debugging  a windows BSOD issue,  we found it is caused by mis-setting 
pte's ED bit for itlb entry.  For hash vTLB, it uses unified tlb and doesn't 
differentiate itc and dtc in its implementation, so itlb_miss handler may 
reference dtlb entry in hash vTLB.  But it may result in issues, because dtlb's 
ED bit may be different with itlb's setting.  Since the case is very rare, so 
just purge the corresponding entry in hash vTLB and let guest OS to determin 
how to set ED bit for itlb mapping once found it. 
Xiantao

Signed-off-by : Xiantao Zhang xiantao.zh...@intel.com

diff -r e97216802360 xen/arch/ia64/vmx/vtlb.c
--- a/xen/arch/ia64/vmx/vtlb.c  Fri Dec 12 10:43:39 2008 +0900
+++ b/xen/arch/ia64/vmx/vtlb.c  Sun Jan 04 10:43:19 2009 +0800
@@ -678,11 +678,20 @@ thash_data_t *vtlb_lookup(VCPU *v, u64 v
 cch = vtlb_thash(hcb-pta, va, vrr.rrval, tag);
 do {
 if (cch-etag == tag  cch-ps == ps)
-return cch;
+goto found;
 cch = cch-next;
 } while(cch);
 }
 return NULL;
+found:
+if (is_data == ISIDE_TLB  !cch-ed) {
+  /*The case is very rare, and it may lead to incorrect setting
+  for itlb's ed bit! Purge it from hash vTLB and let guest os
+  determin the ed bit of the itlb entry.*/
+   vtlb_purge(v, va, ps);
+   cch = NULL;
+}
+return cch;
 }

fix_itlb_ed.patch
Description: fix_itlb_ed.patch
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