On Sat, Dec 02, 2006 at 10:31:11AM -0500, Jimi Xenidis wrote:
The following patch results in SMP stability on Maple. Amos,
Kawachiya-san, could one of you ack it with the JS20 in question?
@@ -193,10 +193,10 @@ void cpu_initialize(int cpuid)
mtdec(timebase_freq);
thanks Amos!
-JX
On Dec 4, 2006, at 10:37 AM, Amos Waterland wrote:
On Sat, Dec 02, 2006 at 10:31:11AM -0500, Jimi Xenidis wrote:
The following patch results in SMP stability on Maple. Amos,
Kawachiya-san, could one of you ack it with the JS20 in question?
@@ -193,10 +193,10 @@ void
-/* FIXME Do not set the NAP and DPM bits in HID0 until we
have had a
- * chance to audit the safe halt and idle loop code. */
+/* FIXME Do not set the NAP bit in HID0 until we have had a
chance
+ * to audit the safe halt and idle loop code. */
hid0.bits.nap = 0; /*
On Dec 2, 2006, at 2:37 AM, Segher Boessenkool wrote:
Do not set the NAP and DPM bits in HID0 until we have had a
chance to
audit the safe halt and idle loop code. Not setting these bits
allows
the model 884241X JS20 blade in TRL to boot correctly, and
possibly also
the Maple in YKT.
On Dec 2, 2006, at 10:18 AM, Jimi Xenidis wrote:
On Dec 2, 2006, at 2:37 AM, Segher Boessenkool wrote:
My question remains: did you try with NAP disabled and
DPM enabled?
I see, so:
HID0[NAP]=1
HID0[DPM]=1
MSR[POW]=1
is NAP and is different than:
HID0[NAP]=0
HID0[DPM]=1
Most JS20 and JS21 have DPM disabled on the board,
What does this mean? SLOF/js2x enables DPM always, for
example; there is no hardware override that I'm aware of.
According to S9.9 of 970FX UM:
Dynamic power management can be disabled in the RAS units by
asserting bit[0]
in the JTAG
