[Xenomai-core] [Patch 6/7] Re-implementation of mutexes, kernel-space support.

No comment. --- include/posix/pthread.h| 56 ksrc/skins/posix/cb_lock.h | 84 ksrc/skins/posix/cond.c| 41 - ksrc/skins/posix/mutex.c | 308 +++-- ksrc/skins/posix/mutex.h | 125 ++

[Xenomai-core] [Patch 7/7] Re-implementation of mutexes, user-space support.

Since binding of the semaphore heaps is now made by xeno_skin_bind, there is much less modifications in src/skins/posix/init.c. However, I had to do something really ugly: since binding the semaphore heaps by xeno_skin_bind requires calls to open, ioctl, mmap, close and munmap, I redefined these

[Xenomai-core] [Patch 2/7] Define XNARCH_SHARED_HEAP_FLAGS

No comment. --- asm-arm/hal.h|7 ++- asm-generic/system.h |6 ++ 2 files changed, 12 insertions(+), 1 deletion(-) Index: include/asm-generic/system.h === --- include/asm-generic/system.h(revision

[Xenomai-core] [Patch 0/7] Posix skin user-space mutexes, second take.

Hi, here comes a second attempt of implementing user-space mutexes for the posix skin. Only differences with the first implementation are explained in the following mails. Thanks in advance for your review. -- Gilles.

[Xenomai-core] [Patch 1/7] Support for non cached memory mappings

In addition to support for non cached memory mappings, this patch implements xnheap_init_mapped and xnheap_destroy_mapped in the !CONFIG_XENO_OPT_PERVASIVE case. This avoids a lot of #ifdefs for users of these functions without user-space support (posix skin shared memories, and the new semaphore

[Xenomai-core] [Patch 4/7] Define ARM atomic operations in user-space

The include/asm-arm/atomic.h header now defines the xnarch_memory_barrier in addition to user-space atomic operations. The pxa3xx deserves a special treatment since it uses the ARMv6 memory barrier operation whereas being an ARMv5 for other operations, hence a special --enable-arm-mach=pxa3xx