Re: [Xenomai-core] [PATCH] reduce config complexity of intr.c

[Jan Kiszka]

Jan Kiszka wrote:
 Here comes an attempt to clean up some of the mess that piled up in
 nucleus/intr.c over the time and specifically after our last hot-fixes.

The first version contained a regression that oops'ed when dumping
/proc/xenomai/stat. Here is -v2 without that bug + a few more
micro-refactorings to kill #ifdefs:

http://www.rts.uni-hannover.de/rtaddon/patches/xenomai/xnintr-cleanups-v2.patch

Jan



signature.asc
Description: OpenPGP digital signature
___
Xenomai-core mailing list
Xenomai-core@gna.org
https://mail.gna.org/listinfo/xenomai-core

Re: [Xenomai-core] [PATCH] reduce config complexity of intr.c

[Jan Kiszka]

Jan Kiszka wrote:
 ...
 Then I reordered some code to avoid warnings for the non-shared non-SMP
 case AND to fix a probable compilation issue of the simulator (due to
 unknown cacheline_aligned_in_smp).

And this add-on patch is needed to make the simulator really build again.

Jan

---
 include/asm-generic/system.h |1 +
 include/asm-sim/system.h |2 ++
 ksrc/nucleus/intr.c  |   10 +-
 ksrc/nucleus/module.c|4 ++--
 4 files changed, 10 insertions(+), 7 deletions(-)

Index: xenomai/include/asm-generic/system.h
===
--- xenomai.orig/include/asm-generic/system.h
+++ xenomai/include/asm-generic/system.h
@@ -123,6 +123,7 @@ typedef struct { atomic_t owner; } xnloc
 
 #define XNARCH_NR_CPUS   RTHAL_NR_CPUS
 
+#define XNARCH_NR_IRQS   RTHAL_NR_IRQS
 #define XNARCH_TIMER_IRQ	 RTHAL_TIMER_IRQ
 
 #define XNARCH_ROOT_STACKSZ   0	/* Only a placeholder -- no stack */
Index: xenomai/include/asm-sim/system.h
===
--- xenomai.orig/include/asm-sim/system.h
+++ xenomai/include/asm-sim/system.h
@@ -85,6 +85,8 @@ typedef unsigned long xnlock_t;
 
 #define XNARCH_NR_CPUS  1
 
+#define XNARCH_NR_IRQS  256
+
 /* Should be equal to the value used for creating the mvmtimer object (mvm_start_timer). */
 #define XNARCH_TIMER_IRQ	1
 
Index: xenomai/ksrc/nucleus/intr.c
===
--- xenomai.orig/ksrc/nucleus/intr.c
+++ xenomai/ksrc/nucleus/intr.c
@@ -141,7 +141,7 @@ typedef struct xnintr_irq {
 
 } cacheline_aligned_in_smp xnintr_irq_t;
 
-static xnintr_irq_t xnirqs[RTHAL_NR_IRQS];
+static xnintr_irq_t xnirqs[XNARCH_NR_IRQS];
 
 /*
  * Low-level interrupt handler dispatching the user-defined ISRs for
@@ -292,7 +292,7 @@ static inline int xnintr_irq_attach(xnin
 	xnintr_t *prev, **p = shirq-handlers;
 	int err;
 
-	if (intr-irq = RTHAL_NR_IRQS)
+	if (intr-irq = XNARCH_NR_IRQS)
 		return -EINVAL;
 
 	if (__testbits(intr-flags, XN_ISR_ATTACHED))
@@ -346,7 +346,7 @@ static inline int xnintr_irq_detach(xnin
 	xnintr_t *e, **p = shirq-handlers;
 	int err = 0;
 
-	if (intr-irq = RTHAL_NR_IRQS)
+	if (intr-irq = XNARCH_NR_IRQS)
 		return -EINVAL;
 
 	if (!__testbits(intr-flags, XN_ISR_ATTACHED))
@@ -386,7 +386,7 @@ typedef struct xnintr_irq {
 
 } cacheline_aligned_in_smp xnintr_irq_t;
 
-static xnintr_irq_t xnirqs[RTHAL_NR_IRQS];
+static xnintr_irq_t xnirqs[XARCH_NR_IRQS];
 #endif /* CONFIG_SMP */
 
 static inline int xnintr_irq_attach(xnintr_t *intr)
@@ -477,7 +477,7 @@ static void xnintr_irq_handler(unsigned 
 int xnintr_mount(void)
 {
 	int i;
-	for (i = 0; i  RTHAL_NR_IRQS; ++i)
+	for (i = 0; i  XNARCH_NR_IRQS; ++i)
 		xnlock_init(xnirqs[i].lock);
 	return 0;
 }
Index: xenomai/ksrc/nucleus/module.c
===
--- xenomai.orig/ksrc/nucleus/module.c
+++ xenomai/ksrc/nucleus/module.c
@@ -438,7 +438,7 @@ static int stat_seq_open(struct inode *i
 	}
 
 	/* Iterate over all IRQ numbers, ... */
-	for (irq = 0; irq  RTHAL_NR_IRQS; irq++) {
+	for (irq = 0; irq  XNARCH_NR_IRQS; irq++) {
 		xnintr_t *prev = NULL;
 		int cpu = 0;
 		int err;
@@ -865,7 +865,7 @@ static int irq_read_proc(char *page,
 		p += sprintf(p, CPU%d, cpu);
 	}
 
-	for (irq = 0; irq  RTHAL_NR_IRQS; irq++) {
+	for (irq = 0; irq  XNARCH_NR_IRQS; irq++) {
 
 		if (rthal_irq_handler(rthal_domain, irq) == NULL)
 			continue;



signature.asc
Description: OpenPGP digital signature
___
Xenomai-core mailing list
Xenomai-core@gna.org
https://mail.gna.org/listinfo/xenomai-core