Hi,
Trying to build a xenomai-enabled kernel using a recent compiler (tried
with gcc version 4.1.1 (CodeSourcery ARM Sourcery G++ 2006q3-26), but
all gcc > 4.1 might be affected) results in the following:
CC kernel/xenomai/nucleus/shadow.o
/tmp/cc0XooxH.s: Assembler messages:
/tmp/cc0XooxH.s:1464: Error: instruction does not accept this addressing mode
-- `ldrex r1,r2'
/tmp/cc0XooxH.s:1466: Error: instruction does not accept this addressing mode
-- `strex r3,r1,r2'
Older gcc (like gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) have no problem with
this.
It appears that the patch below fixes the compile error. I also verified
that gcc-4.0.0 generates identical code using both forms.
Index: include/asm-arm/atomic.h
===================================================================
--- include/asm-arm/atomic.h (révision 2299)
+++ include/asm-arm/atomic.h (copie de travail)
@@ -40,9 +40,9 @@
unsigned long tmp, tmp2;
__asm__ __volatile__("@ atomic_set_mask\n"
-"1: ldrex %0, %2\n"
+"1: ldrex %0, [%2]\n"
" orr %0, %0, %3\n"
-" strex %1, %0, %2\n"
+" strex %1, %0, [%2]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (tmp), "=&r" (tmp2)
@@ -170,9 +170,9 @@
unsigned long tmp, tmp2;
__asm__ __volatile__("@ atomic_set_mask\n"
-"1: ldrex %0, %2\n"
+"1: ldrex %0, [%2]\n"
" orr %0, %0, %3\n"
-" strex %1, %0, %2\n"
+" strex %1, %0, [%2]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (tmp), "=&r" (tmp2)
@@ -185,9 +185,9 @@
unsigned long tmp, tmp2;
__asm__ __volatile__("@ atomic_clear_mask\n"
-"1: ldrex %0, %2\n"
+"1: ldrex %0, [%2]\n"
" bic %0, %0, %3\n"
-" strex %1, %0, %2\n"
+" strex %1, %0, [%2]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (tmp), "=&r" (tmp2)
--
Stelian Pop <[EMAIL PROTECTED]>
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