[Xenomai-git] Philippe Gerum : cobalt/arm: fixups for kernel 4.8+

[git repository hosting]

Module: xenomai-3
Branch: next
Commit: 4b044c1e1005aa76a5eabd15e25a22bbaef5a66b
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=4b044c1e1005aa76a5eabd15e25a22bbaef5a66b

Author: Philippe Gerum 
Date:   Sun May 14 19:41:55 2017 +0200

cobalt/arm: fixups for kernel 4.8+

At this chance, stop using the obsolete flush_cache_all() routine
which cannot honor the documented semantics for arm64.

Besides, calibrating the access times to the timer registers in
no-cache conditions does not make sense.

---

 kernel/cobalt/arch/arm64/machine.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel/cobalt/arch/arm64/machine.c 
b/kernel/cobalt/arch/arm64/machine.c
index ddf65a8..1711d76 100644
--- a/kernel/cobalt/arch/arm64/machine.c
+++ b/kernel/cobalt/arch/arm64/machine.c
@@ -35,7 +35,7 @@ static void mach_arm_prefault(struct vm_area_struct *vma)
flags = (vma->vm_flags & VM_MAYWRITE) ? FAULT_FLAG_WRITE : 0;
for (addr = vma->vm_start;
 addr != vma->vm_end; addr += PAGE_SIZE)
-   handle_mm_fault(vma->vm_mm, vma, addr, flags);
+   handle_mm_fault(vma, addr, flags);
}
 }
 
@@ -63,7 +63,6 @@ static unsigned long mach_arm_calibrate(void)
barrier();
 
for (i = 0; i < CALIBRATION_LOOPS; i++) {
-   flush_cache_all();
for (j = 0; j < CALIBRATION_LOOPS; j++) {
ipipe_read_tsc(start);
barrier();


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[Xenomai-git] Philippe Gerum : cobalt/arm: fixups for kernel 4.8+

[git repository hosting]

Module: xenomai-3
Branch: next
Commit: d1402c30db7be0950206f313cc69a074dabe4490
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=d1402c30db7be0950206f313cc69a074dabe4490

Author: Philippe Gerum 
Date:   Sun May 14 19:41:55 2017 +0200

cobalt/arm: fixups for kernel 4.8+

At this chance, stop using the obsolete flush_cache_all() routine
which cannot honor the documented semantics for arm64.

Besides, calibrating the access times to the timer registers in
no-cache conditions does not make sense.

---

 kernel/cobalt/arch/arm64/machine.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel/cobalt/arch/arm64/machine.c 
b/kernel/cobalt/arch/arm64/machine.c
index ddf65a8..1711d76 100644
--- a/kernel/cobalt/arch/arm64/machine.c
+++ b/kernel/cobalt/arch/arm64/machine.c
@@ -35,7 +35,7 @@ static void mach_arm_prefault(struct vm_area_struct *vma)
flags = (vma->vm_flags & VM_MAYWRITE) ? FAULT_FLAG_WRITE : 0;
for (addr = vma->vm_start;
 addr != vma->vm_end; addr += PAGE_SIZE)
-   handle_mm_fault(vma->vm_mm, vma, addr, flags);
+   handle_mm_fault(vma, addr, flags);
}
 }
 
@@ -63,7 +63,6 @@ static unsigned long mach_arm_calibrate(void)
barrier();
 
for (i = 0; i < CALIBRATION_LOOPS; i++) {
-   flush_cache_all();
for (j = 0; j < CALIBRATION_LOOPS; j++) {
ipipe_read_tsc(start);
barrier();


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[Xenomai-git] Philippe Gerum : cobalt/arm: fixups for kernel 4.8+

[git repository hosting]

Module: xenomai-3
Branch: next
Commit: 6fc88ce4aee343ce1fcf9c9336cb15b776c390f6
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=6fc88ce4aee343ce1fcf9c9336cb15b776c390f6

Author: Philippe Gerum 
Date:   Sun May 14 19:41:55 2017 +0200

cobalt/arm: fixups for kernel 4.8+

At this chance, stop using the obsolete flush_cache_all() routine
which cannot honor the documented semantics for arm64.

Besides, calibrating the access times to the timer registers in
no-cache conditions does not make sense.

---

 kernel/cobalt/arch/arm64/machine.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel/cobalt/arch/arm64/machine.c 
b/kernel/cobalt/arch/arm64/machine.c
index ddf65a8..1711d76 100644
--- a/kernel/cobalt/arch/arm64/machine.c
+++ b/kernel/cobalt/arch/arm64/machine.c
@@ -35,7 +35,7 @@ static void mach_arm_prefault(struct vm_area_struct *vma)
flags = (vma->vm_flags & VM_MAYWRITE) ? FAULT_FLAG_WRITE : 0;
for (addr = vma->vm_start;
 addr != vma->vm_end; addr += PAGE_SIZE)
-   handle_mm_fault(vma->vm_mm, vma, addr, flags);
+   handle_mm_fault(vma, addr, flags);
}
 }
 
@@ -63,7 +63,6 @@ static unsigned long mach_arm_calibrate(void)
barrier();
 
for (i = 0; i < CALIBRATION_LOOPS; i++) {
-   flush_cache_all();
for (j = 0; j < CALIBRATION_LOOPS; j++) {
ipipe_read_tsc(start);
barrier();


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[Xenomai-git] Philippe Gerum : cobalt/arm: fixups for kernel 4.8+

[git repository hosting]

Module: xenomai-3
Branch: next
Commit: ad241cc3a3e6d6a302affde9daaa009211be0020
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=ad241cc3a3e6d6a302affde9daaa009211be0020

Author: Philippe Gerum 
Date:   Sun May 14 19:41:55 2017 +0200

cobalt/arm: fixups for kernel 4.8+

At this chance, stop using the obsolete flush_cache_all() routine
which cannot honor the documented semantics for arm64.

Besides, calibrating the access times to the timer registers in
no-cache conditions does not make sense.

---

 kernel/cobalt/arch/arm64/machine.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel/cobalt/arch/arm64/machine.c 
b/kernel/cobalt/arch/arm64/machine.c
index ddf65a8..1711d76 100644
--- a/kernel/cobalt/arch/arm64/machine.c
+++ b/kernel/cobalt/arch/arm64/machine.c
@@ -35,7 +35,7 @@ static void mach_arm_prefault(struct vm_area_struct *vma)
flags = (vma->vm_flags & VM_MAYWRITE) ? FAULT_FLAG_WRITE : 0;
for (addr = vma->vm_start;
 addr != vma->vm_end; addr += PAGE_SIZE)
-   handle_mm_fault(vma->vm_mm, vma, addr, flags);
+   handle_mm_fault(vma, addr, flags);
}
 }
 
@@ -63,7 +63,6 @@ static unsigned long mach_arm_calibrate(void)
barrier();
 
for (i = 0; i < CALIBRATION_LOOPS; i++) {
-   flush_cache_all();
for (j = 0; j < CALIBRATION_LOOPS; j++) {
ipipe_read_tsc(start);
barrier();


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