[Xenomai-git] Gilles Chanteperdrix : arm: implement signals handling
Module: xenomai-head Branch: master Commit: aec68fb8a3ed5e5070b557d5762b0fe601fbf930 URL: http://git.xenomai.org/?p=xenomai-head.git;a=commit;h=aec68fb8a3ed5e5070b557d5762b0fe601fbf930 Author: Gilles Chanteperdrix gilles.chanteperd...@xenomai.org Date: Mon Nov 23 00:36:41 2009 +0100 arm: implement signals handling --- include/asm-arm/features.h |2 +- include/asm-arm/syscall.h | 66 ++- 2 files changed, 47 insertions(+), 21 deletions(-) diff --git a/include/asm-arm/features.h b/include/asm-arm/features.h index 43a9d82..ecd76da 100644 --- a/include/asm-arm/features.h +++ b/include/asm-arm/features.h @@ -46,7 +46,7 @@ #define __xn_feat_arm_tsc 0x0008 /* The ABI revision level we use on this arch. */ -#define XENOMAI_ABI_REV 2UL +#define XENOMAI_ABI_REV 3UL #if __LINUX_ARM_ARCH__ = 6 /* ARMv6 has both atomic xchg and atomic_inc/dec etc. */ diff --git a/include/asm-arm/syscall.h b/include/asm-arm/syscall.h index 2ff4a28..be16e9c 100644 --- a/include/asm-arm/syscall.h +++ b/include/asm-arm/syscall.h @@ -49,6 +49,7 @@ #define __xn_reg_arg3(regs) ((regs)-ARM_r3) #define __xn_reg_arg4(regs) ((regs)-ARM_r4) #define __xn_reg_arg5(regs) ((regs)-ARM_r5) +#define __xn_reg_sigp(regs) ((regs)-ARM_r6) /* In OABI_COMPAT mode, handle both OABI and EABI userspace syscalls */ #ifdef CONFIG_OABI_COMPAT @@ -86,6 +87,8 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #else /* !__KERNEL__ */ +#include errno.h /* For -ERESTART */ + /* * Some of the following macros have been adapted from Linux's * implementation of the syscall mechanism in asm-arm/unistd.h: @@ -99,32 +102,33 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #error __thread is too buggy with gcc 4.3 and later, please do not pass --with-__thread to configure #endif -#define LOADARGS_0(muxcode, dummy...) \ - __a0 = (unsigned long) (muxcode) -#define LOADARGS_1(muxcode, arg1) \ - LOADARGS_0(muxcode);\ +#define LOADARGS_0(muxcode, sigp, dummy...)\ + __a0 = (unsigned long) (muxcode); \ + __a6 = (unsigned long) (sigp) +#define LOADARGS_1(muxcode, sigp, arg1)\ + LOADARGS_0(muxcode, sigp); \ __a1 = (unsigned long) (arg1) -#define LOADARGS_2(muxcode, arg1, arg2)\ - LOADARGS_1(muxcode, arg1); \ +#define LOADARGS_2(muxcode, sigp, arg1, arg2) \ + LOADARGS_1(muxcode, sigp, arg1);\ __a2 = (unsigned long) (arg2) -#define LOADARGS_3(muxcode, arg1, arg2, arg3) \ - LOADARGS_2(muxcode, arg1, arg2);\ +#define LOADARGS_3(muxcode, sigp, arg1, arg2, arg3)\ + LOADARGS_2(muxcode, sigp, arg1, arg2); \ __a3 = (unsigned long) (arg3) -#define LOADARGS_4(muxcode, arg1, arg2, arg3, arg4)\ - LOADARGS_3(muxcode, arg1, arg2, arg3); \ +#define LOADARGS_4(muxcode, sigp, arg1, arg2, arg3, arg4) \ + LOADARGS_3(muxcode, sigp, arg1, arg2, arg3);\ __a4 = (unsigned long) (arg4) -#define LOADARGS_5(muxcode, arg1, arg2, arg3, arg4, arg5) \ - LOADARGS_4(muxcode, arg1, arg2, arg3, arg4);\ +#define LOADARGS_5(muxcode, sigp, arg1, arg2, arg3, arg4, arg5)\ + LOADARGS_4(muxcode, sigp, arg1, arg2, arg3, arg4); \ __a5 = (unsigned long) (arg5) -#define CLOBBER_REGS_0 r0 +#define CLOBBER_REGS_0 r0, r6 #define CLOBBER_REGS_1 CLOBBER_REGS_0, r1 #define CLOBBER_REGS_2 CLOBBER_REGS_1, r2 #define CLOBBER_REGS_3 CLOBBER_REGS_2, r3 #define CLOBBER_REGS_4 CLOBBER_REGS_3, r4 #define CLOBBER_REGS_5 CLOBBER_REGS_4, r5 -#define LOADREGS_0 __r0 = __a0 +#define LOADREGS_0 __r0 = __a0; __r6 = __a6 #define LOADREGS_1 LOADREGS_0; __r1 = __a1 #define LOADREGS_2 LOADREGS_1; __r2 = __a2 #define LOADREGS_3 LOADREGS_2; __r3 = __a3 @@ -132,7 +136,8 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #define LOADREGS_5 LOADREGS_4; __r5 = __a5 #define ASM_INDECL_0 \ - unsigned long __a0; register unsigned long __r0 __asm__ (r0) + unsigned long __a0; register unsigned long __r0 __asm__ (r0); \ + unsigned long __a6; register unsigned long __r6 __asm__ (r6) #define ASM_INDECL_1 ASM_INDECL_0; \ unsigned long __a1; register unsigned long __r1 __asm__ (r1) #define ASM_INDECL_2 ASM_INDECL_1; \ @@ -144,7 +149,7 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #define ASM_INDECL_5 ASM_INDECL_4; \ unsigned long __a5; register unsigned long __r5 __asm__ (r5) -#define ASM_INPUT_0 0 (__r0) +#define ASM_INPUT_0 0 (__r0), r (__r6) #define ASM_INPUT_1 ASM_INPUT_0, r (__r1) #define ASM_INPUT_2 ASM_INPUT_1, r (__r2) #define ASM_INPUT_3 ASM_INPUT_2, r
[Xenomai-git] Gilles Chanteperdrix : arm: implement signals handling
Module: xenomai-gch Branch: for-head Commit: aec68fb8a3ed5e5070b557d5762b0fe601fbf930 URL: http://git.xenomai.org/?p=xenomai-gch.git;a=commit;h=aec68fb8a3ed5e5070b557d5762b0fe601fbf930 Author: Gilles Chanteperdrix gilles.chanteperd...@xenomai.org Date: Mon Nov 23 00:36:41 2009 +0100 arm: implement signals handling --- include/asm-arm/features.h |2 +- include/asm-arm/syscall.h | 66 ++- 2 files changed, 47 insertions(+), 21 deletions(-) diff --git a/include/asm-arm/features.h b/include/asm-arm/features.h index 43a9d82..ecd76da 100644 --- a/include/asm-arm/features.h +++ b/include/asm-arm/features.h @@ -46,7 +46,7 @@ #define __xn_feat_arm_tsc 0x0008 /* The ABI revision level we use on this arch. */ -#define XENOMAI_ABI_REV 2UL +#define XENOMAI_ABI_REV 3UL #if __LINUX_ARM_ARCH__ = 6 /* ARMv6 has both atomic xchg and atomic_inc/dec etc. */ diff --git a/include/asm-arm/syscall.h b/include/asm-arm/syscall.h index 2ff4a28..be16e9c 100644 --- a/include/asm-arm/syscall.h +++ b/include/asm-arm/syscall.h @@ -49,6 +49,7 @@ #define __xn_reg_arg3(regs) ((regs)-ARM_r3) #define __xn_reg_arg4(regs) ((regs)-ARM_r4) #define __xn_reg_arg5(regs) ((regs)-ARM_r5) +#define __xn_reg_sigp(regs) ((regs)-ARM_r6) /* In OABI_COMPAT mode, handle both OABI and EABI userspace syscalls */ #ifdef CONFIG_OABI_COMPAT @@ -86,6 +87,8 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #else /* !__KERNEL__ */ +#include errno.h /* For -ERESTART */ + /* * Some of the following macros have been adapted from Linux's * implementation of the syscall mechanism in asm-arm/unistd.h: @@ -99,32 +102,33 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #error __thread is too buggy with gcc 4.3 and later, please do not pass --with-__thread to configure #endif -#define LOADARGS_0(muxcode, dummy...) \ - __a0 = (unsigned long) (muxcode) -#define LOADARGS_1(muxcode, arg1) \ - LOADARGS_0(muxcode);\ +#define LOADARGS_0(muxcode, sigp, dummy...)\ + __a0 = (unsigned long) (muxcode); \ + __a6 = (unsigned long) (sigp) +#define LOADARGS_1(muxcode, sigp, arg1)\ + LOADARGS_0(muxcode, sigp); \ __a1 = (unsigned long) (arg1) -#define LOADARGS_2(muxcode, arg1, arg2)\ - LOADARGS_1(muxcode, arg1); \ +#define LOADARGS_2(muxcode, sigp, arg1, arg2) \ + LOADARGS_1(muxcode, sigp, arg1);\ __a2 = (unsigned long) (arg2) -#define LOADARGS_3(muxcode, arg1, arg2, arg3) \ - LOADARGS_2(muxcode, arg1, arg2);\ +#define LOADARGS_3(muxcode, sigp, arg1, arg2, arg3)\ + LOADARGS_2(muxcode, sigp, arg1, arg2); \ __a3 = (unsigned long) (arg3) -#define LOADARGS_4(muxcode, arg1, arg2, arg3, arg4)\ - LOADARGS_3(muxcode, arg1, arg2, arg3); \ +#define LOADARGS_4(muxcode, sigp, arg1, arg2, arg3, arg4) \ + LOADARGS_3(muxcode, sigp, arg1, arg2, arg3);\ __a4 = (unsigned long) (arg4) -#define LOADARGS_5(muxcode, arg1, arg2, arg3, arg4, arg5) \ - LOADARGS_4(muxcode, arg1, arg2, arg3, arg4);\ +#define LOADARGS_5(muxcode, sigp, arg1, arg2, arg3, arg4, arg5)\ + LOADARGS_4(muxcode, sigp, arg1, arg2, arg3, arg4); \ __a5 = (unsigned long) (arg5) -#define CLOBBER_REGS_0 r0 +#define CLOBBER_REGS_0 r0, r6 #define CLOBBER_REGS_1 CLOBBER_REGS_0, r1 #define CLOBBER_REGS_2 CLOBBER_REGS_1, r2 #define CLOBBER_REGS_3 CLOBBER_REGS_2, r3 #define CLOBBER_REGS_4 CLOBBER_REGS_3, r4 #define CLOBBER_REGS_5 CLOBBER_REGS_4, r5 -#define LOADREGS_0 __r0 = __a0 +#define LOADREGS_0 __r0 = __a0; __r6 = __a6 #define LOADREGS_1 LOADREGS_0; __r1 = __a1 #define LOADREGS_2 LOADREGS_1; __r2 = __a2 #define LOADREGS_3 LOADREGS_2; __r3 = __a3 @@ -132,7 +136,8 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #define LOADREGS_5 LOADREGS_4; __r5 = __a5 #define ASM_INDECL_0 \ - unsigned long __a0; register unsigned long __r0 __asm__ (r0) + unsigned long __a0; register unsigned long __r0 __asm__ (r0); \ + unsigned long __a6; register unsigned long __r6 __asm__ (r6) #define ASM_INDECL_1 ASM_INDECL_0; \ unsigned long __a1; register unsigned long __r1 __asm__ (r1) #define ASM_INDECL_2 ASM_INDECL_1; \ @@ -144,7 +149,7 @@ static inline int __xn_interrupted_p(struct pt_regs *regs) #define ASM_INDECL_5 ASM_INDECL_4; \ unsigned long __a5; register unsigned long __r5 __asm__ (r5) -#define ASM_INPUT_0 0 (__r0) +#define ASM_INPUT_0 0 (__r0), r (__r6) #define ASM_INPUT_1 ASM_INPUT_0, r (__r1) #define ASM_INPUT_2 ASM_INPUT_1, r (__r2) #define ASM_INPUT_3 ASM_INPUT_2, r