[Xenomai-git] Gilles Chanteperdrix : powerpc: adapt to refactored timers

2012-04-30 Thread GIT version control
Module: xenomai-forge
Branch: master
Commit: eaf88c8cd464c3053fa241f4fc85169abc17b57d
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=eaf88c8cd464c3053fa241f4fc85169abc17b57d

Author: Gilles Chanteperdrix gilles.chanteperd...@xenomai.org
Date:   Tue Apr 17 00:15:58 2012 +0200

powerpc: adapt to refactored timers

---

 include/asm-powerpc/hal.h|8 
 kernel/cobalt/arch/powerpc/hal.c |   35 +++
 2 files changed, 39 insertions(+), 4 deletions(-)

diff --git a/include/asm-powerpc/hal.h b/include/asm-powerpc/hal.h
index 4b7fa03..721f455 100644
--- a/include/asm-powerpc/hal.h
+++ b/include/asm-powerpc/hal.h
@@ -32,7 +32,11 @@
 #include asm-generic/xenomai/hal.h   /* Read the generic bits. */
 
 #define RTHAL_ARCH_NAMEpowerpc
+#ifndef CONFIG_IPIPE_CORE
 #define RTHAL_TIMER_DEVICE decrementer
+#else /* CONFIG_IPIPE_CORE */
+#define RTHAL_TIMER_DEVICE (ipipe_timer_name())
+#endif /* CONFIG_IPIPE_CORE */
 #define RTHAL_CLOCK_DEVICE timebase
 
 typedef unsigned long long rthal_time_t;
@@ -76,6 +80,7 @@ static inline unsigned long long rthal_rdtsc(void)
 
 static inline void rthal_timer_program_shot(unsigned long delay)
 {
+#ifndef CONFIG_IPIPE_CORE
if (delay  3)
ipipe_post_irq_head(RTHAL_TIMER_IRQ);
else {
@@ -91,6 +96,9 @@ static inline void rthal_timer_program_shot(unsigned long 
delay)
set_dec((int)delay);
 #endif /* CONFIG_40x */
}
+#else /* !CONFIG_IPIPE_CORE */
+   ipipe_timer_set(delay);
+#endif /* !CONFIG_IPIPE_CORE */
 }
 
 /* Private interface -- Internal use only */
diff --git a/kernel/cobalt/arch/powerpc/hal.c b/kernel/cobalt/arch/powerpc/hal.c
index 05aa1e4..9aea41d 100644
--- a/kernel/cobalt/arch/powerpc/hal.c
+++ b/kernel/cobalt/arch/powerpc/hal.c
@@ -54,6 +54,8 @@ static volatile int sync_op;
 
 enum rthal_ktimer_mode rthal_ktimer_saved_mode;
 
+#ifndef CONFIG_IPIPE_CORE
+
 #define RTHAL_SET_ONESHOT_XENOMAI  1
 #define RTHAL_SET_ONESHOT_LINUX2
 #define RTHAL_SET_PERIODIC 3
@@ -134,6 +136,12 @@ static void rthal_timer_set_periodic(void)
rthal_disarm_decr(0);
ipipe_critical_exit(flags);
 }
+#else /* I-pipe core */
+#define rthal_setup_oneshot_dec() do { } while (0)
+#define rthal_setup_periodic_dec() do { } while (0)
+#define rthal_timer_set_oneshot(rt_mode) do { } while (0)
+#define rthal_timer_set_periodic() do { } while (0)
+#endif /* I-pipe core */
 
 static int cpu_timers_requested;
 
@@ -147,11 +155,12 @@ int rthal_timer_request(void (*tick_handler)(void),
unsigned long dummy, *tmfreq = dummy;
int tickval, ret, res;
 
-   if (rthal_timerfreq_arg == 0)
-   tmfreq = rthal_archdata.timer_freq;
-
+#ifndef CONFIG_IPIPE_CORE
res = ipipe_request_tickdev(decrementer, mode_emul, tick_emul, cpu,
tmfreq);
+#else /* CONFIG_IPIPE_CORE */
+   res = ipipe_timer_start(tick_handler, mode_emul, tick_emul, cpu);
+#endif /* CONFIG_IPIPE_CORE */
switch (res) {
case CLOCK_EVT_MODE_PERIODIC:
/* oneshot tick emulation callback won't be used, ask
@@ -185,13 +194,14 @@ int rthal_timer_request(void (*tick_handler)(void),
if (cpu_timers_requested++  0)
goto out;
 
+#ifndef CONFIG_IPIPE_CORE
ret = ipipe_request_irq(rthal_archdata.domain,
RTHAL_TIMER_IRQ,
(ipipe_irq_handler_t)tick_handler,
NULL, NULL);
if (ret)
return ret;
-
+#endif /* !I-ipipe core */
 #ifdef CONFIG_SMP
ret = ipipe_request_irq(rthal_archdata.domain,
RTHAL_TIMER_IPI,
@@ -208,7 +218,11 @@ out:
 
 void rthal_timer_release(int cpu)
 {
+#ifndef CONFIG_IPIPE_CORE
ipipe_release_tickdev(cpu);
+#else /* I-pipe core */
+   ipipe_timer_stop(cpu);
+#endif /* I-pipe core */
 
if (--cpu_timers_requested  0)
return;
@@ -216,7 +230,9 @@ void rthal_timer_release(int cpu)
 #ifdef CONFIG_SMP
ipipe_free_irq(rthal_archdata.domain, RTHAL_TIMER_IPI);
 #endif /* CONFIG_SMP */
+#ifndef CONFIG_IPIPE_CORE
ipipe_free_irq(rthal_archdata.domain, RTHAL_TIMER_IRQ);
+#endif /* !I-pipe core */
 
if (rthal_ktimer_saved_mode == KTIMER_MODE_PERIODIC)
rthal_timer_set_periodic();
@@ -244,6 +260,9 @@ unsigned long rthal_timer_calibrate(void)
 
 int rthal_arch_init(void)
 {
+#ifdef CONFIG_IPIPE_CORE
+   int rc;
+#endif /* I-pipe core */
 #ifdef CONFIG_ALTIVEC
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
printk
@@ -252,6 +271,11 @@ int rthal_arch_init(void)
return -ENODEV;
}
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_IPIPE_CORE
+   rc = ipipe_timers_request();
+   if (rc  0)
+   return rc;
+#endif /* I-pipe core */
 
if (rthal_timerfreq_arg == 0)
  

[Xenomai-git] Gilles Chanteperdrix : powerpc: adapt to refactored timers

2012-04-16 Thread GIT version control
Module: xenomai-gch
Branch: for-forge
Commit: eaf88c8cd464c3053fa241f4fc85169abc17b57d
URL:
http://git.xenomai.org/?p=xenomai-gch.git;a=commit;h=eaf88c8cd464c3053fa241f4fc85169abc17b57d

Author: Gilles Chanteperdrix gilles.chanteperd...@xenomai.org
Date:   Tue Apr 17 00:15:58 2012 +0200

powerpc: adapt to refactored timers

---

 include/asm-powerpc/hal.h|8 
 kernel/cobalt/arch/powerpc/hal.c |   35 +++
 2 files changed, 39 insertions(+), 4 deletions(-)

diff --git a/include/asm-powerpc/hal.h b/include/asm-powerpc/hal.h
index 4b7fa03..721f455 100644
--- a/include/asm-powerpc/hal.h
+++ b/include/asm-powerpc/hal.h
@@ -32,7 +32,11 @@
 #include asm-generic/xenomai/hal.h   /* Read the generic bits. */
 
 #define RTHAL_ARCH_NAMEpowerpc
+#ifndef CONFIG_IPIPE_CORE
 #define RTHAL_TIMER_DEVICE decrementer
+#else /* CONFIG_IPIPE_CORE */
+#define RTHAL_TIMER_DEVICE (ipipe_timer_name())
+#endif /* CONFIG_IPIPE_CORE */
 #define RTHAL_CLOCK_DEVICE timebase
 
 typedef unsigned long long rthal_time_t;
@@ -76,6 +80,7 @@ static inline unsigned long long rthal_rdtsc(void)
 
 static inline void rthal_timer_program_shot(unsigned long delay)
 {
+#ifndef CONFIG_IPIPE_CORE
if (delay  3)
ipipe_post_irq_head(RTHAL_TIMER_IRQ);
else {
@@ -91,6 +96,9 @@ static inline void rthal_timer_program_shot(unsigned long 
delay)
set_dec((int)delay);
 #endif /* CONFIG_40x */
}
+#else /* !CONFIG_IPIPE_CORE */
+   ipipe_timer_set(delay);
+#endif /* !CONFIG_IPIPE_CORE */
 }
 
 /* Private interface -- Internal use only */
diff --git a/kernel/cobalt/arch/powerpc/hal.c b/kernel/cobalt/arch/powerpc/hal.c
index 05aa1e4..9aea41d 100644
--- a/kernel/cobalt/arch/powerpc/hal.c
+++ b/kernel/cobalt/arch/powerpc/hal.c
@@ -54,6 +54,8 @@ static volatile int sync_op;
 
 enum rthal_ktimer_mode rthal_ktimer_saved_mode;
 
+#ifndef CONFIG_IPIPE_CORE
+
 #define RTHAL_SET_ONESHOT_XENOMAI  1
 #define RTHAL_SET_ONESHOT_LINUX2
 #define RTHAL_SET_PERIODIC 3
@@ -134,6 +136,12 @@ static void rthal_timer_set_periodic(void)
rthal_disarm_decr(0);
ipipe_critical_exit(flags);
 }
+#else /* I-pipe core */
+#define rthal_setup_oneshot_dec() do { } while (0)
+#define rthal_setup_periodic_dec() do { } while (0)
+#define rthal_timer_set_oneshot(rt_mode) do { } while (0)
+#define rthal_timer_set_periodic() do { } while (0)
+#endif /* I-pipe core */
 
 static int cpu_timers_requested;
 
@@ -147,11 +155,12 @@ int rthal_timer_request(void (*tick_handler)(void),
unsigned long dummy, *tmfreq = dummy;
int tickval, ret, res;
 
-   if (rthal_timerfreq_arg == 0)
-   tmfreq = rthal_archdata.timer_freq;
-
+#ifndef CONFIG_IPIPE_CORE
res = ipipe_request_tickdev(decrementer, mode_emul, tick_emul, cpu,
tmfreq);
+#else /* CONFIG_IPIPE_CORE */
+   res = ipipe_timer_start(tick_handler, mode_emul, tick_emul, cpu);
+#endif /* CONFIG_IPIPE_CORE */
switch (res) {
case CLOCK_EVT_MODE_PERIODIC:
/* oneshot tick emulation callback won't be used, ask
@@ -185,13 +194,14 @@ int rthal_timer_request(void (*tick_handler)(void),
if (cpu_timers_requested++  0)
goto out;
 
+#ifndef CONFIG_IPIPE_CORE
ret = ipipe_request_irq(rthal_archdata.domain,
RTHAL_TIMER_IRQ,
(ipipe_irq_handler_t)tick_handler,
NULL, NULL);
if (ret)
return ret;
-
+#endif /* !I-ipipe core */
 #ifdef CONFIG_SMP
ret = ipipe_request_irq(rthal_archdata.domain,
RTHAL_TIMER_IPI,
@@ -208,7 +218,11 @@ out:
 
 void rthal_timer_release(int cpu)
 {
+#ifndef CONFIG_IPIPE_CORE
ipipe_release_tickdev(cpu);
+#else /* I-pipe core */
+   ipipe_timer_stop(cpu);
+#endif /* I-pipe core */
 
if (--cpu_timers_requested  0)
return;
@@ -216,7 +230,9 @@ void rthal_timer_release(int cpu)
 #ifdef CONFIG_SMP
ipipe_free_irq(rthal_archdata.domain, RTHAL_TIMER_IPI);
 #endif /* CONFIG_SMP */
+#ifndef CONFIG_IPIPE_CORE
ipipe_free_irq(rthal_archdata.domain, RTHAL_TIMER_IRQ);
+#endif /* !I-pipe core */
 
if (rthal_ktimer_saved_mode == KTIMER_MODE_PERIODIC)
rthal_timer_set_periodic();
@@ -244,6 +260,9 @@ unsigned long rthal_timer_calibrate(void)
 
 int rthal_arch_init(void)
 {
+#ifdef CONFIG_IPIPE_CORE
+   int rc;
+#endif /* I-pipe core */
 #ifdef CONFIG_ALTIVEC
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
printk
@@ -252,6 +271,11 @@ int rthal_arch_init(void)
return -ENODEV;
}
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_IPIPE_CORE
+   rc = ipipe_timers_request();
+   if (rc  0)
+   return rc;
+#endif /* I-pipe core */
 
if (rthal_timerfreq_arg == 0)