[Xenomai-git] Philippe Gerum : drivers/can: merge assorted CAN fixes from 2.6.x
Module: xenomai-3 Branch: master Commit: 02bc0b1bc778e6262933ab8377298c3b6d7781ee URL: http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=02bc0b1bc778e6262933ab8377298c3b6d7781ee Author: Philippe GerumDate: Tue Sep 8 20:42:47 2015 +0200 drivers/can: merge assorted CAN fixes from 2.6.x commit a7b94fc631816e64988f32247edc788e7c70efd1 Author: Matthew Lindner Date: Mon Oct 20 17:24:45 2014 -0400 drivers/can: Properly initialize bittime commit 7fcc04ce4bca162bc3367c4f04b8bd96edc02ca9 Author: Gilles Chanteperdrix Date: Wed Jan 29 12:57:24 2014 +0100 drivers/flexcan: avoid unaligned access commit 34c5ec7a704115cd84530ee36c540b981f1fef4e Author: Henri Roosen Date: Tue May 28 13:14:09 2013 +0200 Fix rtcan_flexcan for mx6 for OpenFirmware platforms The default rx fifo global mask register, newly introduced in mx6q, is 0x and the reset value in Message buffers(can be reused as the memory of rx fifo filter table) is none zero, it will wrongly cause the can to be unable to recevie packets due to filter. We need to clear it to make sure to receive all packets. Signed-off-by: Henri Roosen Acked-by: Wolfgang Grandegger commit e7fb1d155969a6cf3194e1a7b5257e5375b328f0 Author: Henri Roosen Date: Tue May 28 13:14:09 2013 +0200 make rtcan_flexcan driver compatible with non OpenFirmware platforms This also fixes the rx fifo global mask for mx6: The default rx fifo global mask register, newly introduced in mx6q, is 0x and the reset value in Message buffers(can be reused as the memory of rx fifo filter table) is none zero, it will wrongly cause the can to be unable to recevie packets due to filter. We need to clear it to make sure to receive all packets. Signed-off-by: Henri Roosen Acked-by: Wolfgang Grandegger --- kernel/drivers/can/rtcan_flexcan.c | 141 +--- kernel/drivers/can/rtcan_raw.c | 39 -- kernel/drivers/can/rtcan_raw_dev.c |1 + 3 files changed, 113 insertions(+), 68 deletions(-) diff --git a/kernel/drivers/can/rtcan_flexcan.c b/kernel/drivers/can/rtcan_flexcan.c index 1290118..adfbef8 100644 --- a/kernel/drivers/can/rtcan_flexcan.c +++ b/kernel/drivers/can/rtcan_flexcan.c @@ -30,9 +30,11 @@ #include #include #include +#include #include #include #include +#include #include @@ -42,20 +44,15 @@ #include "rtcan_raw.h" #include "rtcan_internal.h" -/* - * Due to a bug in most Flexcan cores, the bus error interrupt needs - * to be enabled. Otherwise we don't get any bus warning or passive - * interrupts. This is not necessay for the i.MX28, for example and - * this modules parameter allows to overcome this limitation. - */ -static int berr_int = 1; -module_param(berr_int, int, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(berr_int, - "Bus error interrupt [1 (enabled)]. Can be disabled for i.MX28."); - #define DEV_NAME "rtcan%d" #define DRV_NAME "flexcan" +enum flexcan_ip_version { + FLEXCAN_VER_3_0_0, + FLEXCAN_VER_3_0_4, + FLEXCAN_VER_10_0_12, +}; + /* 8 for RX fifo and 2 error handling */ #define FLEXCAN_NAPI_WEIGHT(8 + 2) @@ -160,6 +157,23 @@ MODULE_PARM_DESC(berr_int, #define FLEXCAN_MB_CODE_MASK (0xf0ff) +/* + * FLEXCAN hardware feature flags + * + * Below is some version info we got: + *SOC Version IP-Version Glitch- [TR]WRN_INT + *Filter? connected? + * MX25 FlexCAN2 03.00.00.00 no no + * MX28 FlexCAN2 03.00.04.00yesyes + * MX35 FlexCAN2 03.00.00.00 no no + * MX53 FlexCAN2 03.00.00.00yes no + * MX6s FlexCAN3 10.00.12.00yesyes + * + * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. + */ +#define FLEXCAN_HAS_V10_FEATURES BIT(1) /* For core version >= 10 */ +#define FLEXCAN_HAS_BROKEN_ERR_STATE BIT(2) /* [TR]WRN_INT not connected */ + /* Structure of the message buffer */ struct flexcan_mb { u32 can_ctrl; @@ -182,10 +196,20 @@ struct flexcan_regs { u32 imask1; /* 0x28 */ u32 iflag2; /* 0x2c */ u32 iflag1; /* 0x30 */ - u32 _reserved2[19]; + u32 crl2; /* 0x34 */ + u32 esr2; /* 0x38 */ + u32 _reserved2[2]; + u32 crcr; /* 0x44 */ + u32 rxfgmask; /* 0x48 */ + u32 rxfir; /* 0x4c */ + u32 _reserved3[12]; struct flexcan_mb cantxfg[64]; }; +struct flexcan_devtype_data { + u32 features; /* hardware controller features */ +}; + struct flexcan_priv { struct rtcan_device *dev; @@ -194,10
[Xenomai-git] Philippe Gerum : drivers/can: merge assorted CAN fixes from 2.6.x
Module: xenomai-3 Branch: arm64 Commit: 02bc0b1bc778e6262933ab8377298c3b6d7781ee URL: http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=02bc0b1bc778e6262933ab8377298c3b6d7781ee Author: Philippe GerumDate: Tue Sep 8 20:42:47 2015 +0200 drivers/can: merge assorted CAN fixes from 2.6.x commit a7b94fc631816e64988f32247edc788e7c70efd1 Author: Matthew Lindner Date: Mon Oct 20 17:24:45 2014 -0400 drivers/can: Properly initialize bittime commit 7fcc04ce4bca162bc3367c4f04b8bd96edc02ca9 Author: Gilles Chanteperdrix Date: Wed Jan 29 12:57:24 2014 +0100 drivers/flexcan: avoid unaligned access commit 34c5ec7a704115cd84530ee36c540b981f1fef4e Author: Henri Roosen Date: Tue May 28 13:14:09 2013 +0200 Fix rtcan_flexcan for mx6 for OpenFirmware platforms The default rx fifo global mask register, newly introduced in mx6q, is 0x and the reset value in Message buffers(can be reused as the memory of rx fifo filter table) is none zero, it will wrongly cause the can to be unable to recevie packets due to filter. We need to clear it to make sure to receive all packets. Signed-off-by: Henri Roosen Acked-by: Wolfgang Grandegger commit e7fb1d155969a6cf3194e1a7b5257e5375b328f0 Author: Henri Roosen Date: Tue May 28 13:14:09 2013 +0200 make rtcan_flexcan driver compatible with non OpenFirmware platforms This also fixes the rx fifo global mask for mx6: The default rx fifo global mask register, newly introduced in mx6q, is 0x and the reset value in Message buffers(can be reused as the memory of rx fifo filter table) is none zero, it will wrongly cause the can to be unable to recevie packets due to filter. We need to clear it to make sure to receive all packets. Signed-off-by: Henri Roosen Acked-by: Wolfgang Grandegger --- kernel/drivers/can/rtcan_flexcan.c | 141 +--- kernel/drivers/can/rtcan_raw.c | 39 -- kernel/drivers/can/rtcan_raw_dev.c |1 + 3 files changed, 113 insertions(+), 68 deletions(-) diff --git a/kernel/drivers/can/rtcan_flexcan.c b/kernel/drivers/can/rtcan_flexcan.c index 1290118..adfbef8 100644 --- a/kernel/drivers/can/rtcan_flexcan.c +++ b/kernel/drivers/can/rtcan_flexcan.c @@ -30,9 +30,11 @@ #include #include #include +#include #include #include #include +#include #include @@ -42,20 +44,15 @@ #include "rtcan_raw.h" #include "rtcan_internal.h" -/* - * Due to a bug in most Flexcan cores, the bus error interrupt needs - * to be enabled. Otherwise we don't get any bus warning or passive - * interrupts. This is not necessay for the i.MX28, for example and - * this modules parameter allows to overcome this limitation. - */ -static int berr_int = 1; -module_param(berr_int, int, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(berr_int, - "Bus error interrupt [1 (enabled)]. Can be disabled for i.MX28."); - #define DEV_NAME "rtcan%d" #define DRV_NAME "flexcan" +enum flexcan_ip_version { + FLEXCAN_VER_3_0_0, + FLEXCAN_VER_3_0_4, + FLEXCAN_VER_10_0_12, +}; + /* 8 for RX fifo and 2 error handling */ #define FLEXCAN_NAPI_WEIGHT(8 + 2) @@ -160,6 +157,23 @@ MODULE_PARM_DESC(berr_int, #define FLEXCAN_MB_CODE_MASK (0xf0ff) +/* + * FLEXCAN hardware feature flags + * + * Below is some version info we got: + *SOC Version IP-Version Glitch- [TR]WRN_INT + *Filter? connected? + * MX25 FlexCAN2 03.00.00.00 no no + * MX28 FlexCAN2 03.00.04.00yesyes + * MX35 FlexCAN2 03.00.00.00 no no + * MX53 FlexCAN2 03.00.00.00yes no + * MX6s FlexCAN3 10.00.12.00yesyes + * + * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. + */ +#define FLEXCAN_HAS_V10_FEATURES BIT(1) /* For core version >= 10 */ +#define FLEXCAN_HAS_BROKEN_ERR_STATE BIT(2) /* [TR]WRN_INT not connected */ + /* Structure of the message buffer */ struct flexcan_mb { u32 can_ctrl; @@ -182,10 +196,20 @@ struct flexcan_regs { u32 imask1; /* 0x28 */ u32 iflag2; /* 0x2c */ u32 iflag1; /* 0x30 */ - u32 _reserved2[19]; + u32 crl2; /* 0x34 */ + u32 esr2; /* 0x38 */ + u32 _reserved2[2]; + u32 crcr; /* 0x44 */ + u32 rxfgmask; /* 0x48 */ + u32 rxfir; /* 0x4c */ + u32 _reserved3[12]; struct flexcan_mb cantxfg[64]; }; +struct flexcan_devtype_data { + u32 features; /* hardware controller features */ +}; + struct flexcan_priv { struct rtcan_device *dev; @@ -194,10
[Xenomai-git] Philippe Gerum : drivers/can: merge assorted CAN fixes from 2.6.x
Module: xenomai-3 Branch: next Commit: 02bc0b1bc778e6262933ab8377298c3b6d7781ee URL: http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=02bc0b1bc778e6262933ab8377298c3b6d7781ee Author: Philippe GerumDate: Tue Sep 8 20:42:47 2015 +0200 drivers/can: merge assorted CAN fixes from 2.6.x commit a7b94fc631816e64988f32247edc788e7c70efd1 Author: Matthew Lindner Date: Mon Oct 20 17:24:45 2014 -0400 drivers/can: Properly initialize bittime commit 7fcc04ce4bca162bc3367c4f04b8bd96edc02ca9 Author: Gilles Chanteperdrix Date: Wed Jan 29 12:57:24 2014 +0100 drivers/flexcan: avoid unaligned access commit 34c5ec7a704115cd84530ee36c540b981f1fef4e Author: Henri Roosen Date: Tue May 28 13:14:09 2013 +0200 Fix rtcan_flexcan for mx6 for OpenFirmware platforms The default rx fifo global mask register, newly introduced in mx6q, is 0x and the reset value in Message buffers(can be reused as the memory of rx fifo filter table) is none zero, it will wrongly cause the can to be unable to recevie packets due to filter. We need to clear it to make sure to receive all packets. Signed-off-by: Henri Roosen Acked-by: Wolfgang Grandegger commit e7fb1d155969a6cf3194e1a7b5257e5375b328f0 Author: Henri Roosen Date: Tue May 28 13:14:09 2013 +0200 make rtcan_flexcan driver compatible with non OpenFirmware platforms This also fixes the rx fifo global mask for mx6: The default rx fifo global mask register, newly introduced in mx6q, is 0x and the reset value in Message buffers(can be reused as the memory of rx fifo filter table) is none zero, it will wrongly cause the can to be unable to recevie packets due to filter. We need to clear it to make sure to receive all packets. Signed-off-by: Henri Roosen Acked-by: Wolfgang Grandegger --- kernel/drivers/can/rtcan_flexcan.c | 141 +--- kernel/drivers/can/rtcan_raw.c | 39 -- kernel/drivers/can/rtcan_raw_dev.c |1 + 3 files changed, 113 insertions(+), 68 deletions(-) diff --git a/kernel/drivers/can/rtcan_flexcan.c b/kernel/drivers/can/rtcan_flexcan.c index 1290118..adfbef8 100644 --- a/kernel/drivers/can/rtcan_flexcan.c +++ b/kernel/drivers/can/rtcan_flexcan.c @@ -30,9 +30,11 @@ #include #include #include +#include #include #include #include +#include #include @@ -42,20 +44,15 @@ #include "rtcan_raw.h" #include "rtcan_internal.h" -/* - * Due to a bug in most Flexcan cores, the bus error interrupt needs - * to be enabled. Otherwise we don't get any bus warning or passive - * interrupts. This is not necessay for the i.MX28, for example and - * this modules parameter allows to overcome this limitation. - */ -static int berr_int = 1; -module_param(berr_int, int, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(berr_int, - "Bus error interrupt [1 (enabled)]. Can be disabled for i.MX28."); - #define DEV_NAME "rtcan%d" #define DRV_NAME "flexcan" +enum flexcan_ip_version { + FLEXCAN_VER_3_0_0, + FLEXCAN_VER_3_0_4, + FLEXCAN_VER_10_0_12, +}; + /* 8 for RX fifo and 2 error handling */ #define FLEXCAN_NAPI_WEIGHT(8 + 2) @@ -160,6 +157,23 @@ MODULE_PARM_DESC(berr_int, #define FLEXCAN_MB_CODE_MASK (0xf0ff) +/* + * FLEXCAN hardware feature flags + * + * Below is some version info we got: + *SOC Version IP-Version Glitch- [TR]WRN_INT + *Filter? connected? + * MX25 FlexCAN2 03.00.00.00 no no + * MX28 FlexCAN2 03.00.04.00yesyes + * MX35 FlexCAN2 03.00.00.00 no no + * MX53 FlexCAN2 03.00.00.00yes no + * MX6s FlexCAN3 10.00.12.00yesyes + * + * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. + */ +#define FLEXCAN_HAS_V10_FEATURES BIT(1) /* For core version >= 10 */ +#define FLEXCAN_HAS_BROKEN_ERR_STATE BIT(2) /* [TR]WRN_INT not connected */ + /* Structure of the message buffer */ struct flexcan_mb { u32 can_ctrl; @@ -182,10 +196,20 @@ struct flexcan_regs { u32 imask1; /* 0x28 */ u32 iflag2; /* 0x2c */ u32 iflag1; /* 0x30 */ - u32 _reserved2[19]; + u32 crl2; /* 0x34 */ + u32 esr2; /* 0x38 */ + u32 _reserved2[2]; + u32 crcr; /* 0x44 */ + u32 rxfgmask; /* 0x48 */ + u32 rxfir; /* 0x4c */ + u32 _reserved3[12]; struct flexcan_mb cantxfg[64]; }; +struct flexcan_devtype_data { + u32 features; /* hardware controller features */ +}; + struct flexcan_priv { struct rtcan_device *dev; @@ -194,10