Now that mesa 10.1 is released, we can enable this by
default for CIK parts. Tiling improves memory bandwidth
utilization.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
src/radeon_kms.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 4a6c38e..4f1f5ee 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -868,13 +868,13 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
* with proper bit, in the meantime you need to set tiling option in
* xorg configuration files
*/
- info->ChipFamily <= CHIP_FAMILY_HAINAN &&
+ info->ChipFamily <= CHIP_FAMILY_HAWAII &&
!info->is_fast_fb;
/* 2D color tiling */
if (info->ChipFamily >= CHIP_FAMILY_R600) {
info->allowColorTiling2D = xf86ReturnOptValBool(info->Options,
OPTION_COLOR_TILING_2D,
-
info->ChipFamily <= CHIP_FAMILY_HAINAN);
+
info->ChipFamily <= CHIP_FAMILY_HAWAII);
}
if (info->ChipFamily >= CHIP_FAMILY_R600) {
--
1.8.3.1
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