On Mit, 2010-09-01 at 10:37 +1200, Karl Tomlinson wrote:
Michel Dänzer writes:
* Patch 4 introduces a big endian build break (typo, pSrc instead
of pDst in RADEONUploadToScreenCS) which is silently fixed in
patch 5.
Sorry about that. I can touch that up, but,
Michel Dänzer writes:
On Mit, 2010-09-01 at 10:37 +1200, Karl Tomlinson wrote:
Michel Dänzer writes:
I wondered whether PrepareAccess could fail for the visible screen
with mixed pixmaps as suggested here
http://www.mentby.com/maarten-maathuis/exa-classic-problem-with-xv.html
When I
2010/9/1 xm...@karlt.net:
Michel Dänzer writes:
On Mit, 2010-09-01 at 10:37 +1200, Karl Tomlinson wrote:
Michel Dänzer writes:
I wondered whether PrepareAccess could fail for the visible screen
with mixed pixmaps as suggested here
Michel Dänzer writes:
On Mit, 2010-09-01 at 10:37 +1200, Karl Tomlinson wrote:
Michel Dänzer writes:
I wondered whether PrepareAccess could fail for the visible screen
with mixed pixmaps as suggested here
http://www.mentby.com/maarten-maathuis/exa-classic-problem-with-xv.html
When I
Alex Deucher writes:
2010/9/1 xm...@karlt.net:
Michel Dänzer writes:
, still it would be good to make some additional measurements
to make sure there aren't any bad regressions.
I'll look into it. Let me know if there is a subset of x11perf
tests that is interesting here. I just saw
First of all, thanks a lot for splitting up the patch from the bug
report, this was very helpful for review. Unfortunately though, the
split isn't quite perfect:
* Patch 4 introduces a big endian build break (typo, pSrc instead
of pDst in RADEONUploadToScreenCS) which is silently
Thank you for taking the time to look at this, Michel.
Michel Dänzer writes:
First of all, thanks a lot for splitting up the patch from the bug
report, this was very helpful for review. Unfortunately though, the
split isn't quite perfect:
* Patch 4 introduces a big endian build break
:00:00 2001
From: Karl Tomlinson kar...@karlt.net
Date: Sun, 22 Aug 2010 22:46:33 +1200
Subject: [PATCH 6/6] RADEONPrepareAccess_CS: fallback to DFS when pixmap is in
VRAM
This avoids costly CPU VRAM reads and lets EXA manage a system memory cache
of the portions of pixmaps needed for unaccelerated
