Hello sigrok developers! I would like to post few notes on proposed API (http://www.sigrok.org/wiki/Formats_and_structures).
struct samplerates ------------------ generally it is not good idea to represent sample rate in frequency units (1/sec), instead of period (sec). This is because lot (if not all) LA are based on some type of FPGA. Idea, that there is some sort of PLL is odd. Most of analyzers will have capability to capture samples at some base_rate and its multiples. For example Sigma can capture at sample rates 50MHz, 25MHz, 16.666MHz, 12.5MHz, 10MHz, 8.333MHz, 7.143Hz etc... In case of Sigma, the divisor is 8-bit, so the values in proposed structure would be: low=196078; high=50000000; step=0; and list would contain 255 values. Imagine what would happen if I say the divisor is 16-bit. On the other hand, if the units would be, say picoseconds, this would give: low=5100000; high=20000; step=20000, which is much simplier, despite the fact, that frequecies like 50/3MHz would not never be recorded exactly. We fight another problem, that periods, like 3.333ns are also often used. So one should define the time unit as 15 = 1ps or similar to cover divisors 3 and 5. Please note, that Sigma can also measure at samplerate defined by external clock. This means there should be (at least in context of DF_HEADER packet) value of samplerate meaning "unknown". struct datafeed --------------- I don't see anywhere in DF_LOGICxx packets usage of timestamps. Or am I missing something? For RLE (or maybe something better) enabled logic analyzers, this is crucial. With Sigma, typical 2 minute test have 6G of samples. I don't see any reference to ability to rewrite already received data. The communication of Sigma works in this way: The logic analyzer makes a test. The test is stored in up to 32MB memory. A "fingerprint" of the test is downloaded and shown to the user. This fingerprint is 294912bytes. Memory is divided into 32768 chunks and downloaded is 9 bytes per chunk. This takes about half second. Each chunk now knows its min and max vector (probes which change within it). The rest of memory is downloaded quietly in background (newly created thread). If user zooms onto some segment of test, the corresponding chunk is downloaded in preference. Typically, user have its view within two seconds. Downloading whole test takes about 1 minute. If I understand it, how the API will work, the analyzer (plugin) upon receiving stop_acquisition() will start calling receive_data_callback with the measured data in DF_LOGICxx and finally DF_END. But this would take Sigma hardware one minute and user will fall asleep. Best regards, Ondřej ------------------------------------------------------------------------------ _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
