Iztok Jeras wrote: > > > The other question is regarding external clock. > > > > Absoultely no idea how this is handled or if it is handled. > > I will try to read the documentation for a device with a SPI slave > port and a separate internal clock (I already know SPI Flash), for > example an ARM SoC, since the problem is similar.
The peripheral has a FIFO which gets filled from the external clock domain and triggers an interrupt in the internal clock domain when data is available. //Peter ------------------------------------------------------------------------------ See everything from the browser to the database with AppDynamics Get end-to-end visibility with application monitoring from AppDynamics Isolate bottlenecks and diagnose root cause in seconds. Start your free trial of AppDynamics Pro today! http://pubads.g.doubleclick.net/gampad/clk?id=48808831&iu=/4140/ostg.clktrk _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
