Hi,
Attached patch improves the sample positions in uart decoder when
bit_width is an odd number. This is especially important for accurate
decoding at high rates such as 3 samples per bit.
Example of difference (no change for even bit_width):
http://kapsi.fi/~jpa/stuff/pix/sigrok_uart_fix.png
--
Petteri
>From 01e8a2ad917ee54163e6488e65c04f8dcacf40fb Mon Sep 17 00:00:00 2001
From: Petteri Aimonen <j...@git.mail.kapsi.fi>
Date: Sun, 15 Feb 2015 19:08:36 +0200
Subject: [PATCH] Improve uart decoder sample positions at high data rates.
At 3 samples per bit, the uart decoder took the value at the last sample
instead of the middle one. Improve calculations so that sampling is more
accurate at odd number of samples per bit.
---
decoders/uart/pd.py | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index d59c6c3..7995e99 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -19,6 +19,7 @@
##
import sigrokdecode as srd
+from math import floor, ceil
'''
OUTPUT_PYTHON format:
@@ -139,24 +140,24 @@ class Decoder(srd.Decoder):
)
def putx(self, rxtx, data):
- s, halfbit = self.startsample[rxtx], int(self.bit_width / 2)
- self.put(s - halfbit, self.samplenum + halfbit, self.out_ann, data)
+ s, halfbit = self.startsample[rxtx], self.bit_width / 2.0
+ self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_ann, data)
def putpx(self, rxtx, data):
- s, halfbit = self.startsample[rxtx], int(self.bit_width / 2)
- self.put(s - halfbit, self.samplenum + halfbit, self.out_python, data)
+ s, halfbit = self.startsample[rxtx], self.bit_width / 2.0
+ self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_python, data)
def putg(self, data):
- s, halfbit = self.samplenum, int(self.bit_width / 2)
- self.put(s - halfbit, s + halfbit, self.out_ann, data)
+ s, halfbit = self.samplenum, self.bit_width / 2.0
+ self.put(s - floor(halfbit), s + ceil(halfbit), self.out_ann, data)
def putp(self, data):
- s, halfbit = self.samplenum, int(self.bit_width / 2)
- self.put(s - halfbit, s + halfbit, self.out_python, data)
+ s, halfbit = self.samplenum, self.bit_width / 2.0
+ self.put(s - floor(halfbit), s + ceil(halfbit), self.out_python, data)
def putbin(self, rxtx, data):
- s, halfbit = self.startsample[rxtx], int(self.bit_width / 2)
- self.put(s - halfbit, self.samplenum + halfbit, self.out_bin, data)
+ s, halfbit = self.startsample[rxtx], self.bit_width / 2.0
+ self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_bin, data)
def __init__(self, **kwargs):
self.samplerate = None
@@ -189,7 +190,9 @@ class Decoder(srd.Decoder):
# bitpos is the samplenumber which is in the middle of the
# specified UART bit (0 = start bit, 1..x = data, x+1 = parity bit
# (if used) or the first stop bit, and so on).
- bitpos = self.frame_start[rxtx] + (self.bit_width / 2.0)
+ # The samples within bit are 0, 1, ..., (bit_width - 1), therefore
+ # index of the middle sample within bit window is (bit_width - 1) / 2.
+ bitpos = self.frame_start[rxtx] + (self.bit_width - 1) / 2.0
bitpos += bitnum * self.bit_width
if self.samplenum >= bitpos:
return True
--
1.9.1
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