On Tue, Jun 28, 2016 at 3:07 PM Uwe Hermann <u...@hermann-uwe.de> wrote:
> On Fri, Jun 24, 2016 at 04:26:16AM +0000, Mike Meyer wrote:
> > Two questions: Anyone working on a driver for the JYETech DSO112A USB
> > oscilloscope?
> We're not aware of anyone working on that, no. Contributions for that
> would be very welcome. Also, as a start, wiki photos and "lsusb -v"
> output and such would be great (please join on on IRC in #sigrok for a
> wiki account).
>
Wiki photos? Not sure what you mean by that. But it looks straightforward
enough. They have both complete documentation in the online manual (
http://www.jyetech.com/Products/LcdScope/UserManual_112A.pdf) and have
released the source to their jyelab product (
https://github.com/JYEtech/jyeLab.git). While they haven't added DSO112A
support to it, it looks like it implements the protocol and just needs that
type added (probably make a lot of people happy if the DSO112 was added as
well).
I suspect that lsusb isn't all that interesting. They put a usb<->serial
interface inside the box, and it attaches as as a serial device. The short
version is:
Bus /dev/usb Device /dev/ugen3.8: ID 10c4:ea60 Cygnal Integrated Products,
Inc. CP210x Composite Device
If it's still of interest, I can grab the full output. But after finishing
up a couple of things I'm in the middle of, I expect to take a look at it.
But I certainly wouldn't mind if someone else did it first, and would be
glad to help with testing or chasing down testers for other jyetech devices.
> > I notice the FreeBSD port hasn't been updated to the 0.4.0 release. Is
> > anyone on the list looking into doing that?
>
> Nobody from the upstream developers as far as I'm aware. The current
> packages were done by Uffe Jakobsen <u...@uffe.org> (CC'd), but I don't
> know whether he's still actively working on updates.
>
I actually pinged him a week or so ago with no answer, as my salea logic
clone doesn't work on FreeBSD in 4.0. the library and cli build and work as
well as the existing port, but pulseview doesn't build (IIRC, I ran into
the same thing when working with Uffe on the logic analyzer issue).
Would it help if I opened issues for one or more of these things?
Thanks,
Mike
------------------------------------------------------------------------------
Attend Shape: An AT&T Tech Expo July 15-16. Meet us at AT&T Park in San
Francisco, CA to explore cutting-edge tech and listen to tech luminaries
present their vision of the future. This family event has something for
everyone, including kids. Get more information and register today.
http://sdm.link/attshape
_______________________________________________
sigrok-devel mailing list
sigrok-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/sigrok-devel
