Hello, There is also a port of the logicsniffer to the blackice iCE40 FPGA board: https://github.com/hoglet67/Ice40LogicSniffer, but I haven't tested it. But the design should be easily portable to other ICE40 based devices.
I'm trying to find time to add a sigrok driver for the sump2 hardware. So far I've done only the initialization/acquisition part. Need to finish reading the captured samples. The code can be found here: https://github.com/ironsteel/libsigrok/tree/bml_sump2 На пн, 22.10.2018 г. в 21:39 ч. David Slipper <softf...@hotmail.com> написа: > > That is very interesting > Thanks, > Dave > > > https://www.sump.org/projects/analyzer/ and > > https://sigrok.org/wiki/Openbench_Logic_Sniffer and > > https://sigrok.org/wiki/Saanlima_Pipistrello_OLS are > > all FPGA-based devices using the SUMP protocol and > > supported by sigrok. > > > > >From what I understand, SUMP2 is a completely > > incompatible protocol, only related to the SUMP project > > by name. While I'm not sure the project was named > > SUMP2 when there's no compatibility at all, the author > > is "definitely open to working with the Sigrok software > > community" [1]. > > > > Up until now, however, no one picked up this task, so > > I assume no one is willing to put in the effort. > > > > All the best, > > -Soeren > > > > > > > > [1] https://blackmesalabs.wordpress.com/2016/10/24/sump2-96-msps-logic- > > analyzer-for-22/ > > > > On Mon, 2018-10-22 at 14:26 +0300, Aleksander Alekseev wrote: > >> Hello David, > >> > >> As far as I know SUMP2 protocol is not yet implemented in Sigrok. > >> You > >> can still use SUMP2 with it's own Python client, though it doesn't > >> support any decoders, so you will have to write them manually (or > >> better > >> write a driver for Sigrok, which actually could be fun). > >> > >> If I'm not mistaken Sigrok supposed to support SUMP protocol, though > >> the > >> protocol is slow and typically used by MCU-based devices, like Bus > >> Pirate. > >> > >> On 10/22/18 2:56 AM, David Slipper wrote: > >>> Thanks very much for that! > >>> > >>> What about the "Sump/Sump2" projects ?? Basing something on an FPGA > >>> dev > >>> board seems a nice idea. > >>> > >>> However I have seen a comment that it has now moved well beyond the > >>> "sump" protocol - does that mean it's no longer compatible with > >>> "Pulseview" ?? > >>> > >>> I looked at "Logic Sniffer" but that hardware doesn't seem to be > >>> available any more. > >>> > >>> David > >>> > >>> > >>> _______________________________________________ > >>> sigrok-devel mailing list > >>> sigrok-devel@lists.sourceforge.net > >>> https://lists.sourceforge.net/lists/listinfo/sigrok-devel > >> > > . > > > > > _______________________________________________ > sigrok-devel mailing list > sigrok-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/sigrok-devel _______________________________________________ sigrok-devel mailing list sigrok-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sigrok-devel
