I just wrote a patch [1] for USB because it proved flaky unless the
sampling rate was very high.
It seems the vast majority of protocol decoders require a sample rate
more than ~ 4x the clock rate to work reliably, whereas it should
(theoretically) be possible to create protocol decoders at much lower
frequencies, as low as the data rate itself.
That gets more important as people try to use sigrok to analyze faster
signals where data rates get high and equipment gets expensive.
I propose therefore a 'virtual sampler' interface, which would return
to a decoder the data as-if sampled at the exact rate and alignment it
chose. For example, for RS232 (pseudocode):
# wait for clock edge
self.wait([{0: 'e'}])
self.align(samplerate: 115200, length: 11, pattern: [{0: '0********11'}] )
data = self.get_samples(11)
The smart logic would be in the 'align' function call, which could
look forward in time to find the exact best alignment of the 'decoder
sample rate' to the 'capture device sample rate'. It could also be
extensible to allow the samplerate to be specified as a range, using
the clock edges in the data to set the exact rate.
Any opinions on the approach?
Oliver
[1]:
https://github.com/Hello1024/libsigrokdecode/commit/71d7cfa7ab57c0a17844a4ad4e257067e91f33b7
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