Hello sdbbs, > > * Why did PulseView decide to map (U8) byte value 0x00 to -500 mV, > > and (U8) byte value 0xFF to 500 mV? In other words, how did it > > decide on this default range - is this documented anywhere, and can > > I change the interpreted analog range (in volts)?
The range of the data type you use (0..255 for u8) is mapped to the voltage range of -0.5V and +0.5V, as you noticed. That is not done within PulseView, it's a property of the input module raw_analog. See https://sigrok.org/gitweb/?p=libsigrok.git;a=blob;f=src/input/raw_analo g.c;hb=HEAD#l55 > > * When I use Sample rate (Hz): 0, PulseView seemingly choses 10 ms > > as sample period by default. Why is this number chosen, and is this > > documented anywhere? (I expect if I enter a proper sampling rate, > > then I'll get the corresponding sampling period instead). That's not the behavior I see. For me, using a sample rate of 0 results in PV using samples as the measurement scale, as indicated by the "sa" unit shown in the timeline. In this case, any protocol decoder can't give proper timing information and actually shouldn't. How did you come to the conclusion that 10 ms sample period is used? > * Does PulseView have any kind of support for Hi-Z as a logic state > (in VCD or not)? As of now it doesn't, it only supports 1 and 0. In the future we do want to support all the other states but currently, that would be a huge impact on performance, so we need to rework the inner workings before this can happen. > * If not, is there a "cheap" way for me to quickly implement it (e.g. > maybe there is an enum or something I could change in the source, so > that Z would be interpreted from a VCD file as its own state; or > maybe I could add another threshold conversion algo, with additional > set of thresholds for Hi-Z when converting analog signal to logic - > so I'd have something to work with, even without full support for Hi- > Z throughout the program)? Since you seem to create the differential signal using an external tool, maybe you can use the tool to generate another analog channel, this time indicating the hi-Z state - kind of like a "signal valid" channel? You could convert that to a logic channel and feed it to your protocol decoder along with the other signal(s) you need. > * Is there a way, to peek into the analog source of a logic signal > (at a given time/samplenum), from inside a PulseView/sigrok Python > decoder? As of now, libsigrokdecode only supports logic channels, which is why a conversion is needed for analog channels. This, too, is going to change... eventually. We're a small team with lots of items on the wish list, so unfortunately, it takes time. > Many thanks in advance for any answers! Thanks for using our software! -Soeren > > > > _______________________________________________ > sigrok-devel mailing list > sigrok-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/sigrok-devel _______________________________________________ sigrok-devel mailing list sigrok-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sigrok-devel
