Hi all, I hope that I'll be able to get a bit of help here - roughly, my question is this:
* If I establish a setup in PulseView, that uses analog channels, conversion to logic, and protocol decoding; and save this as an .sr file; - can I then use sigrok-cli to browse the decoded data in the .sr file? ... though there are subquestions later on in this mail. To illustrate this, I have come up with a test case, which I'm going to present here. First of all, I used the Python ripyl library to generate the test data: http://kevinpt.github.io/ripyl/index.html The test data is essentially a 38400 baud, 8N1 UART signal (TTL logic), that encodes 'Hello world!\r\n', sampled at 12.5 MHz as analog signal. There are three channels: non-inverting version, inverting version, and differential version (non-inverting minus inverting). To generate the test data, simply rename the attached `ripyl_gen_uart_data.py.txt` to `ripyl_gen_uart_data.py`, and then run it with Python that has ripyl installed: python3 ripyl_gen_uart_data.py As output, you will get a binary file in the same directory called `uart-sig.bin`, which contains the interleaved binary data for these three analog channels. Additionally, if you have `matplotlib` installed, you will get this plot: https://imgur.com/a1yp4Bb ( post with all images at: https://imgur.com/a/1uiTJjb ) Now that we have the test data, fire up PulseView, and do: "Import Raw analog data without header...", choose `uart-sig.bin` in the file dialog, and then enter in the prompt box: https://imgur.com/9sY5AnS Data format: FLOAT_LE Number of analog channels: 3 Sample rate (Hz): 12500000 After the signals are shown, click on CH3 (the differential channel), and choose: https://imgur.com/4aQk06X Conversion: to logic via threshold Conversion threshold(s): Signal average ... and CH3 will be reinterpreted as binary logic. Finally, from the protocol decoder button/list in PulseView, choose UART - and then click on the newly placed UART track label, and enter: https://imgur.com/ncwDhkm TX (UART transmit line): CH3 Baud rate: 38400 Data format: ascii ... and you should be able to see the UART data properly decoded in PulseView. So, this shows PulseView is capable of handling this kind of a setup. Lets save all this, via the PulseView save button / Save As ... - and save it as a file `uart-sig.sr`. Here is a copy of that file for easier download: https://gofile.io/?c=7TjrU9 Now we can go to sigrok-cli - note the version I use is: ``` $ 'C:\Program Files (x86)\sigrok\sigrok-cli\sigrok-cli' --version sigrok-cli 0.8.0-git-c4af232 ``` The first thing I expected by browsing through the sigrok-cli docs, was that the `--show` command can be used to tell me what sort of channels I have inside the `.sr` file, but that is not really true, at least for this syntax I used: ``` $ 'C:\Program Files (x86)\sigrok\sigrok-cli\sigrok-cli' -i uart-sig.sr --show demo - Demo device with 12 channels: D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 Channel groups: Logic: channels D0 D1 D2 D3 D4 D5 D6 D7 Analog: channels A0 A1 A2 A3 A0: channel A0 A1: channel A1 A2: channel A2 A3: channel A3 Supported configuration options across all channel groups: continuous: on, off limit_samples: 0 (current) limit_time: 0 (current) limit_frames: 0 (current) samplerate (1 Hz - 1 GHz in steps of 1 Hz) averaging: on, off (current) avg_samples: 0 (current) Supported triggers: 0 1 r f e captureratio: 20 (current) ``` So, a subquestion: * Is there a sigrok-cli command, that I can use, to tell me what do I have in an `.sr` file? In this case, I'd have wished it to tell me, that in `uart-sig.sr` I have: CH1 as analog, CH2 as analog, CH3 as analog and converted/thresholded logic, and UART as a decoder channel (applied to CH3 as logic). Anyways, if I simply call sigrok-cli with `uart-sig.sr` as input file, I get all CH1 values dumped, followed by all CH2 values, etc: ``` $ 'C:\Program Files (x86)\sigrok\sigrok-cli\sigrok-cli' -i uart-sig.sr --samples 10 CH1: 5.00 V DC CH1: 4.94 V DC CH1: 4.97 V DC CH1: 4.98 V DC CH1: 4.98 V DC CH1: 4.97 V DC CH1: 4.98 V DC CH1: 4.99 V DC ... ``` So, another subquestion: * I would have expected here, that `--samples 10` would limited the sample dump to, well, 10 samples - but instead, I get all possible data dumped. Is it possible to limit the amount of samples dumped to terminal in a case like this, and if so, how? Anyway, what I'm interested in the end, is that `sigrok-cli` dumps the samplenumber (or time) of the start of each decoded character from the UART signal, as well as the character itself - basically, I'd wish for an output like: ``` 34 us: UART character: 'H' 304 us: UART character: 'e' 575 us: UART character: 'l' ... ``` ... and so on. However, if I call sigrok-cli with the `uart-sig.sr` as input file, and uart as decoder - I simply get nothing: ``` $ 'C:\Program Files (x86)\sigrok\sigrok-cli\sigrok-cli' -i uart-sig.sr -P uart $ ``` I'd imagine, here I'd at least have to tell the decoder, that it should decode CH3 - but interpreted as digital logic; and I'm not really sure how to do that (especially since I don't have the information on what sort of a layout sigrok-cli would see in the input file). Or, maybe I could just try to directly "browse" the UART (decoded) channel - but I'm not even sure that it is included in its entirety in the .sr file (again, I don't really know what sigrok-cli sees in the .sr file). So, final subquestion: * Is it possible to use sigrok-cli, to browse only the decoded UART data, from an .sr file like this - and if so, how? Many thanks in advance for any hints, Cheers!
#!/usr/bin/env python3 # call with: # python3 ripyl_gen_uart_data.py import os this_script_dir_path = os.path.dirname(os.path.realpath(__file__)) out_bin_file = os.path.join(this_script_dir_path, "uart-sig.bin") import numpy as np import ripyl import ripyl.sigproc as sigp import ripyl.protocol.uart as uart import ripyl.streaming as stream try: import matplotlib from matplotlib import pyplot as plt matplotlib_exists = True except ImportError: matplotlib_exists = False if matplotlib_exists: import ripyl.util.plot as rplot from collections import OrderedDict # this function mostly ripped from ripyl_git/test/test_uart.py; also http://kevinpt.github.io/ripyl/rst/tut_plot.html def doGenUartSignal(): msgStr = "Hello World!\r\n" msg = list(msgStr) msg = ''.join(msg) baud = 38400 sample_rate = 12500000 # 12.5 MHz rise_time = sigp.min_rise_time(baud*100) * 10.0 bits = 8 parity = None stop_bits = 1 print('\nUART signal setup: msg="{}", baud={}, parity={}, bits={}, stop_bits={}'.format(msg, baud, parity, bits, stop_bits)) # note about uart_synth: "The signal is generated with idle-high polarity." http://kevinpt.github.io/ripyl/apidoc/ripyl.protocol.html edgesA = uart.uart_synth(bytearray(msg.encode('utf-8')), bits, baud, parity=parity, stop_bits=stop_bits, idle_start=100.0 / sample_rate) samplesA = sigp.synth_wave(edgesA, sample_rate, rise_time, ripple_db=60) VCC = 5.0 noisyA_it = sigp.amplify(sigp.noisify(samplesA, snr_db=40), gain=VCC) noisyA = list(noisyA_it) #print("noisy: {}".format( noisyA[0].samples )) all_noisyA = np.concatenate( [nit.samples for nit in noisyA] ) print("Conc. all_noisyA: {} {}: {}".format(all_noisyA.dtype, all_noisyA.shape, all_noisyA)) sample_period = 1.0/sample_rate all_noisyB = np.subtract(VCC, all_noisyA) noisyB = stream.samples_to_sample_stream(all_noisyB, sample_period) print("Conc. all_noisyB: {} {}: {}".format(all_noisyB.dtype, all_noisyB.shape, all_noisyB)) all_noisyC = np.subtract(all_noisyA, all_noisyB) noisyC = stream.samples_to_sample_stream(all_noisyC, sample_period) print("Conc. all_noisyC: {} {}: {}".format(all_noisyC.dtype, all_noisyC.shape, all_noisyC)) # https://www.schlameel.com/2017/06/09/interleaving-and-de-interleaving-data-with-python/ arr_tuple = (all_noisyA, all_noisyB, all_noisyC) interleaved = np.vstack(arr_tuple).reshape((-1,), order='F') # since by default np.array stores float64 (double), change it to float32 (float), little endian ('<') interleaved = interleaved.astype('<f4') print("Interleaved: {} {}: {}".format(interleaved.dtype, interleaved.shape, interleaved)) # save interleaved data: interleaved.tofile(out_bin_file) print("Saved interleaved data as file: {}".format(out_bin_file)) if matplotlib_exists: decoded_frames = uart.uart_decode(noisyA, bits=bits, stop_bits=stop_bits, polarity=uart.UARTConfig.IdleHigh, parity=parity, baud_rate=baud) decoded_frames = list(decoded_frames) channels = OrderedDict([ ('UART noninv', noisyA), ('UART inv', noisyB), ('UART diff', noisyC) ]) title='UART example' annotations = decoded_frames # None plotter = rplot.Plotter() plotter.plot(channels, annotations, title, label_format=stream.AnnotationFormat.Text) plotter.show() # Show the plot in a matplotlib window if __name__ == "__main__": doGenUartSignal()
_______________________________________________ sigrok-devel mailing list sigrok-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sigrok-devel
