Hi all, i'm new to this list and i'm currently working on improving the DSLogic port and finally adding support for U3Pro16 (https://sigrok.org/wiki/DreamSourceLab_DSLogic_U3Pro16). I plan to add the U3Pro16 to the existing dreamsourcelab-dslogic device driver even though the API has changed a bit, the majority of the code is common and creating a new device would lead to lots of code duplication - but we can discuss separately.
Prior to adding support for U3Pro16 I made a few improvements to the existing device driver since U3Pro16 is a high speed device with up to 1GHz sample rate. I found out that the bottleneck in the existing driver is the deinterleave_buffer function which converts the received data from DSLogic to the format sigrok is expecting. The existing implementation looped over every single bit, making it inefficient assuming that a typical trace contains little signal changes compared to the sample rate. I changed the implementation in a way that it forward-copies the last block of 64 words, make a mem compare of the last received data from DSLogic with the latest received one and only if there is a change I apply the bit-wise operation. I'm not sure how you guys prefer to handle patches - i've read that submitting them in the email is fine as well as creating pull requests. For now i created a pull request: https://github.com/sigrokproject/libsigrok/pull/167 How did I test that? Well, i have a working port already for U3Pro16 :-) But I would like to upstream things step-by-step so that changes are easier and more obvious to follow. I will prepare another pull request once this one is merged where I introduced a dedicated worker-thread in dreamsourcelab-dslogic to process/deinterleave the received the next USB request is already handled in parallel. Christian. _______________________________________________ sigrok-devel mailing list sigrok-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sigrok-devel
