Hi,
1. Lambda Concept already did a FT60X open source Linux driver! These guys
rock!
https://github.com/lambdaconcept/ft60x_driver
2. Yep
3. On top of that there is a handshake for the fifo that could be done in
discreet logic but would probably be easier / cheaper in a pld or FPGA then you
could include bigger buffer, timing data, etc etc. if you're making a board
with this chip then might as well add the cheap FPGA - I can highly recommend
PCBWay, i have no affiliation but they're easy for quick proto and will
populate boards at a cost too.
Timing diagram in the docs if you wanna check.
DS_FT600Q-FT601Q-IC-Datasheet.pdf https://share.google/tLX2Dg7Rw1vNUnk0J
Good luck on your journey
On Sunday, October 19, 2025 at 03:09:27 AM GMT+7, Ladislav Laska
<[email protected]> wrote:
Hi All,
interesting, but I don't think it's a good idea:
1. I found no documentation on the USB protocol. This would have to be
reverse-engineered from the closed source D3XX driver.
2. There is a very limited buffer on the chip itself (a couple of kB).
3. The chip is meant to implement clocked protocols. It possibly
generates the clock itself, I did not find a way to configure a trigger
input to sample data. In addition, the data packet likely does not have
a timestamp. This means the data read would not have reliable timing
operation, making it useless for data analysis (a lot of jitter,
possibly clock drift or even missed data if the jitter is significantly
more than the period of a sampled signal).
Now, I'm not 100% sure as I didn't spend a whole lot of time on this,
but I strongly suggest somebody proves me wrong before much time/money is
spent on the hardware.
This likely is a reason why CoLA mentioned here pairs it with an FPGA --
the FPGA will provide stable sampling clock, buffer, compression - then
stream this data to the PC via the FT601 chip. This is completely fine,
since the timing is as good as the FPGA can provide (pretty good even if
it's a slow one) and even if in the worst case the buffer overflows, the
FPGA can at least recognize this and throw an error - better than hide
something.
Cheers,
Ladislav
On Thu, Oct 16, 2025 at 02:41:11PM -0700, Ivan Wick wrote:
> Hi Dan,
> I see on the Sigrok wiki that there has been some prior hardware designed
> with the FT601: https://sigrok.org/wiki/CoLA
> This uses the FT601 for a host interface, and logic signals are read by an
> FPGA which can also do multiplexing etc.
> But if I understood your idea correctly, it is to read logic signals
> directly into the FT601 FIFOs without another chip, which is a simpler,
> less expensive design.
>
> Anyway, there is a barrier to using the FT601 chip: "The CoLA does not have
> integration into Sigrok and Pulseview. This is because the used FT601
> driver is from FTDI and is closed source. This is the reason that prevents
> the software from being released under Sigrok compatible licence."
>
> The closed source driver mentioned is D3xx:
> https://ftdichip.com/drivers/d3xx-drivers/
> So we could probably get an FT601 device working "out-of-tree" using the
> proprietary driver, but I couldn't find a free software library (analogous
> to libftdi) to drive the FT601.
>
>
> On Wed, Oct 15, 2025 at 4:36 AM Daniel Tzschentke <[email protected]> wrote:
>
> > Hi Everyone,
> >
> > Thanks a lot for Sigrok!
> >
> > Recently I came across this USB3 (super speed) chip: FT601 from FTDI
> > https://ftdichip.com/products/ft601q-b/
> > It's a 32 bit sync FIFO to USB3 bridge and intended for parallel camera
> > interfaces.
> >
> > My first thought was, that it should be pretty straight forward to build
> > a 32 channel 100 MHz logic analyzer with it.
> >
> > I was thinking of an open source/community logic analyzer made for
> > Sigrok - schematic and pcb I know how to do, but I have no idea how to
> > support the chip in Sigrok - would anyone be up for taking care of the
> > Sigrok support?
> >
> > I could send out some PCBs to developer from the first test batch but
> > would also upload all the kicad files (sch, pcb, bom, gbr, ...) to a
> > public github repo, so anyone could order PCBs.
> >
> > What do you guys think?
> >
> > Best,
> > Dan
> >
> >
> >
> > _______________________________________________
> > sigrok-devel mailing list
> > [email protected]
> > https://lists.sourceforge.net/lists/listinfo/sigrok-devel
> >
> _______________________________________________
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--
S pozdravem Ladislav "Krakonoš" Láska http://www.krakonos.org/
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