I started simics from flexpoint_001 which is used by UP.OoO. As you can see in
my first post, the "forced resync" messages occur in the 300K cycles from the
first flexpoint. To ensure the coverage, I run simics for 10M cycles
mahmood@mpc:simics$ simics -stall flexpoint_001
....
simics> c 10_000_000
[cpu0] v:0x0000000000069d54 p:0x00005091d54 and %o1, 8, %g2
simics>
As you can see, there is nothing wrong with that.
As far as I know, if a SPARC instruction is not implemented in flexus, then it
may encounter an exception. In that case, it will rely on simics to find out
what is the correct path. Is that right? then the forced resync messages I got
are related to flexus itself.
The verb messages about one of the resync messages are
337750 <debug.cpp:160> {412548}- sys-uarch*** ROB Contents ***
337751 <debug.cpp:163> {412548}- #545423[00] @v:001278abc |ffffffffc0f2084c|
stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE {force-resync}
{completed}
337752 <debug.cpp:163> {412548}- #545424[00] @v:001278ac0 |ffffffff8143e040|
membar #Sync {completed}
337753 <debug.cpp:163> {412548}- #545425[00] @v:001278ac4 |ffffffff80a0000c|
cmp %g0, %o4 {completed}
337754 <debug.cpp:163> {412548}- #545426[00] @v:001278ac8 |124ffffd| bne,pt
%icc, 0x1278abc {completed}
337755 <debug.cpp:163> {412548}- #545427[00] @v:001278acc |ffffffff9823000a|
sub %o4, %o2, %o4 {executed}
337756 <debug.cpp:163> {412548}- #545428[00] @v:001278abc |ffffffffc0f2084c|
stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
337757 <debug.cpp:163> {412548}- #545429[00] @v:001278ac0 |ffffffff8143e040|
membar #Sync {completed}
337758 <debug.cpp:163> {412548}- #545430[00] @v:001278ac4 |ffffffff80a0000c|
cmp %g0, %o4
337759 <debug.cpp:180> {412548}- sys-uarch*** MemQueue Contents ***
337760 <debug.cpp:183> {412548}- LSQ(AwaitingPort)[102558] Store(8) v:0050a0560
p:0050a0560 =0 x=0 {asi 0x42} {store-complete} {side-effect} {non-cacheable}
{completes at 412547} {#545423[00] @v:001278abc |ffffffffc0f2084c| stxa %g0,
[%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE {force-resync} {completed}}
337761 <debug.cpp:183> {412548}- LSQ(IssuedToMemory)[102559] MEMBARMarker
{#545424[00] @v:001278ac0 |ffffffff8143e040| membar #Sync
{completed}}
337762 <debug.cpp:183> {412548}- LSQ(AwaitingAddress)[102560] Store(8)
v:ffffffffffffffff p:ffffffffffffffff =0 {#545428[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE}
337763 <debug.cpp:183> {412548}- LSQ(IssuedToMemory)[102561] MEMBARMarker
{#545429[00] @v:001278ac0 |ffffffff8143e040| membar #Sync
{completed}}
337764 <cycle.cpp:179> {412548}- *** Prepare ***
337765 <cycle.cpp:186> {412548}- *** Eval ***
337766 <WritebackAction.cpp:96> {412548}- CPU[00]#545427 WritebackAction rd: pd
result: result
337767 <BaseSemanticAction.cpp:163> {412548}- CPU[00]#545430 ReadRegister ps2
store in operand2 rescheduled
337768 <WritebackAction.cpp:100> {412548}- CPU[00]#545427 WritebackAction rd=
r-Registers[164] result=1344
337769 <ReadRegisterAction.cpp:92> {412548}- CPU[00]#545430 ReadRegister ps2
store in operand2 bypassed ps2 = 1344 written to operand2
337770 <BaseSemanticAction.cpp:163> {412548}- CPU[00]#545430 ExecuteAction
Sub_cc rescheduled
337771 <BaseSemanticAction.cpp:163> {412548}- CPU[00]#545430 ExecuteAction Sub
rescheduled
337772 <SemanticInstruction.cpp:144> {412548}- CPU[00]#545427 may retire
337773 <ExecuteAction.cpp:135> {412548}- CPU[00]#545428 ExecuteAction Add
operands: op1=84541440 op2=1344 result=84542784
337774 <BaseSemanticAction.cpp:163> {412548}- CPU[00]#545428
UpdateAddressAction rescheduled
337775 <UpdateAddressAction.cpp:110> {412548}- CPU[00]#545428
UpdateAddressAction updating vaddr=v:0050a0540 asi=42
337776 <memunit.cpp:606> {412548}- Resolved VAddr for
LSQ(AwaitingAddress)[102560] Store(8) v:ffffffffffffffff p:ffffffffffffffff =0
{#545428[00] @v:001278abc |ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 #
ASI_DCACHE_INVALIDATE} to v:0050a0540
337777 <memunit.cpp:520> {412548}- sys-uarch SideEffect access:
LSQ(AwaitingIssue)[102560] Store(8) v:0050a0540 p:0050a0540 =0 {asi 0x42}
{side-effect} {non-cacheable} {#545428[00] @v:001278abc |ffffffffc0f2084c| stxa
%g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE}
337778 <memforward.cpp:226> {412548}- Updating loads dependant on
LSQ(AwaitingIssue)[102560] Store(8) v:0050a0540 p:0050a0540 =0 {asi 0x42}
{side-effect} {non-cacheable} {#545428[00] @v:001278abc |ffffffffc0f2084c| stxa
%g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE {force-resync}}
337779 <memforward.cpp:254> {412548}- Search complete.
337780 <cycle.cpp:189> {412548}- *** Issue Mem ***
337781 <cycle.cpp:200> {412548}- *** Arb ***
337782 <cycle.cpp:894> {412548}- sys-uarch Retire:#545423[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {completed}
337783 <memunit.cpp:167> {412548}- Popping LSQEntry: LSQ(AwaitingIssue)[102558]
Store(8) v:0050a0560 p:0050a0560 =0 x=0 {asi 0x42} {store-complete}
{side-effect} {non-cacheable} {completes at 412547} {#545423[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {completed}}
337784 <Effects.cpp:852> {412548}- #545423[00] @v:001278abc |ffffffffc0f2084c|
stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE {force-resync}
{completed} Retiring memory instruction
337785 <WhiteBoxImpl.cpp:209> {412548}- IdleThread_t: ffffffffffffffff
337786 <cycle.cpp:1493> {412548}- sys-uarch isIdleLoop:
idle=0xffffffffffffffff== ct=0x300036b4f00 : 0
337787 <cycle.cpp:1100> {412548}- sys-uarch FinalCommit:#545423[00]
@v:001278abc |ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 #
ASI_DCACHE_INVALIDATE {force-resync} {retired} NPC=v:001278ac0
337788 <Effects.cpp:870> {412548}- #545423[00] @v:001278abc |ffffffffc0f2084c|
stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE {force-resync} {retired}
Commit store instruction
337789 <cycle.cpp:1174> {412548}- Forced Resync:#545423[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
337790 <accounting.cpp:128> {412548}- Unknown resync for instruction code:
SideEffectStore
337791 <microArch.cpp:384> {412548}- CPU[00] Resynchronizing Instruction.
Resynchronizing with Simics.
337792 <v9DecoderImpl.cpp:152> {412548}- Dispatch SQUASH: Resynchronize FIQ
discarding: 8 instructions
337793 <uFetchImpl.cpp:392> {412548}- CPU[00.0] Fetch SQUASH: Resynchronize
337794 <uFetchImpl.cpp:404> {412548}- CPU[00.0] Change CPU State. TL: 0
PSTATE: 16
337795 <uFetchImpl.cpp:404> {412548}- CPU[00.0] Change CPU State. TL: 0
PSTATE: 16
337796 <SplitDestinationMapperImpl.cpp:504> {412548}- Checking if MemoryIn[0] =
2*3+0 = 6 is available
How do you interpret that?
// Naderan *Mahmood;
----- Original Message -----
From: Djordje Jevdjic <[email protected]>
To: Mahmood Naderan <[email protected]>
Cc: simflex <[email protected]>
Sent: Monday, July 11, 2011 12:05 AM
Subject: RE: Forced Resync messages
Dear Mahmood,
Presumably you have created some flexpoints/checkpoints and you are running
timing simulations.
You can simply start Simics (without Flexus), load the corresponding checkpoint
and see if how your
workload runs. Highly likely the program you are running has thrown an
exception (or something similar)
and you are looping in some system code. Before doing simulations, you must
first verify that your
workload runs correctly in Simics and completes normally, without any problems.
Regards,
Djordje
________________________________________
From: Mahmood Naderan [[email protected]]
Sent: Sunday, July 10, 2011 9:23 PM
To: Djordje Jevdjic
Cc: simflex
Subject: Re: Forced Resync messages
>you should stop the simulation and check the Simics console
what do you mean by checking simics console? You mean Verb messages?
// Naderan *Mahmood;
----- Original Message -----
From: Djordje Jevdjic <[email protected]>
To: Mahmood Naderan <[email protected]>; simflex <[email protected]>
Cc:
Sent: Sunday, July 10, 2011 7:47 PM
Subject: RE: Forced Resync messages
Dear Mahmood,
There are few SPARC instructions that have not been implemented in Flexus yet,
and they can cause messages similar to those below.
However, in your case it looks like that your workload has encountered some
software exception and you are actually
not executing anything useful. Your program has probably stopped and you should
stop the simulation and check the Simics console.
Regards,
Djordje
________________________________________
From: Mahmood Naderan [[email protected]]
Sent: Tuesday, July 05, 2011 7:56 AM
To: simflex
Subject: Forced Resync messages
Hi
Is there any concern about so many "Forced Resync"?
108 <mai_api.cpp:99> {296388}- CPU[0] Interrupt 4e
109 <cycle.cpp:66> {296390}- sys-uarch Interrupt: 4e pending for 1
110 <cycle.cpp:1174> {296981}- Forced Resync:#417106[00] @v:00100b498
|ffffffffa3458000| rd %softint, %l1 {force-resync}RDPRUnsupported
111 <flexus.cpp:272> {300000}- Timestamp: 2011-Jul-05 10:18:18
112 <microArch.cpp:365> {300000}- Timestamp: 2011-Jul-05 10:18:18
113 <cycle.cpp:1174> {300223}- Forced Resync:#419765[00] @v:00127d060
|ffffffffb3828000| wr %o2, %g0, %stick_cmpr {force-resync}WRPRUnsupported
114 <cycle.cpp:1174> {300282}- Forced Resync:#419827[00] @v:00127d9cc
|ffffffff9b464000| rd %stick_cmpr, %o5 {force-resync}RDPRUnsupported
115 <cycle.cpp:1174> {300468}- Forced Resync:#419874[00] @v:00127d9f8
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
116 <mai_api.cpp:99> {300729}- CPU[0] Interrupt 4a
117 <cycle.cpp:66> {300734}- sys-uarch Interrupt: 4a pending for 4
118 <cycle.cpp:1174> {304898}- Forced Resync:#422586[00] @v:00100b068
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
119 <mai_api.cpp:99> {304980}- CPU[0] Interrupt 41
120 <cycle.cpp:66> {304985}- sys-uarch Interrupt: 41 pending for 4
121 <mai_api.cpp:99> {306121}- CPU[0] Interrupt 49
122 <cycle.cpp:66> {306123}- sys-uarch Interrupt: 49 pending for 1
123 <cycle.cpp:1174> {308047}- Forced Resync:#424467[00] @v:00100b068
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
124 <mai_api.cpp:99> {308496}- CPU[0] Interrupt 49
125 <cycle.cpp:66> {308498}- sys-uarch Interrupt: 49 pending for 1
126 <cycle.cpp:1174> {308966}- Forced Resync:#425193[00] @v:00127a1cc
|ffffffffc0f208e0| stxa %g0, [%o0 + %g0] 0x47 # ASI_DCACHE_TAG
{force-resync} {retired}
127 <accounting.cpp:128> {308966}- Unknown resync for instruction code:
SideEffectStore
128 <cycle.cpp:1174> {308984}- Forced Resync:#425231[00] @v:00127a1cc
|ffffffffc0f208e0| stxa %g0, [%o0 + %g0] 0x47 # ASI_DCACHE_TAG
{force-resync} {retired}
129 <accounting.cpp:128> {308984}- Unknown resync for instruction code:
SideEffectStore
130 <cycle.cpp:1174> {309106}- Forced Resync:#425377[00] @v:00100b068
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
131 <mai_api.cpp:99> {309528}- CPU[0] Interrupt 49
132 <cycle.cpp:66> {309530}- sys-uarch Interrupt: 49 pending for 1
133 <microArch.cpp:365> {310000}- Timestamp: 2011-Jul-05 10:18:21
134 <cycle.cpp:1174> {310096}- Forced Resync:#426237[00] @v:00100b068
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
135 <cycle.cpp:1174> {310424}- Forced Resync:#426681[00] @v:00100b068
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
143 <cycle.cpp:1174> {381828}- Forced Resync:#513541[00] @v:0010490d4
|ffffffffd42a4000| stb %o2, [%o1 + %g0] {force-resync} {retired}
144 <accounting.cpp:128> {381828}- Unknown resync for instruction code:
SideEffectStore
145 <cycle.cpp:1174> {382092}- Forced Resync:#513732[00] @v:001049114
|ffffffffd4224000| stw %o2, [%o1 + %g0] {force-resync} {retired}
146 <accounting.cpp:128> {382092}- Unknown resync for instruction code:
SideEffectStore
147 <cycle.cpp:1174> {382110}- Forced Resync:#513769[00] @v:0010490d4
|ffffffffd42a4000| stb %o2, [%o1 + %g0] {force-resync} {retired}
148 <accounting.cpp:128> {382110}- Unknown resync for instruction code:
SideEffectStore
149 <cycle.cpp:1174> {382226}- Forced Resync:#513831[00] @v:001049114
|ffffffffd4224000| stw %o2, [%o1 + %g0] {force-resync} {retired}
150 <accounting.cpp:128> {382226}- Unknown resync for instruction code:
SideEffectStore
151 <mai_api.cpp:99> {386290}- CPU[0] Interrupt 60
152 <cycle.cpp:66> {386292}- sys-uarch Interrupt: 60 pending for 1
153 <mai_api.cpp:99> {386647}- CPU[0] Interrupt 45
154 <cycle.cpp:66> {386653}- sys-uarch Interrupt: 45 pending for 5
155 <cycle.cpp:1174> {387722}- Forced Resync:#517309[00] @v:001049054
|ffffffffd00a4000| ldub [%o1 + %g0], %o0 {force-resync} {retired}
156 <cycle.cpp:1174> {387933}- Forced Resync:#517484[00] @v:001049054
|ffffffffd00a4000| ldub [%o1 + %g0], %o0 {force-resync} {retired}
157 <cycle.cpp:1174> {388132}- Forced Resync:#517650[00] @v:001049094
|ffffffffd0024000| lduw [%o1 + %g0], %o0 {force-resync} {retired}
158 <cycle.cpp:1174> {388193}- Forced Resync:#517682[00] @v:001049054
|ffffffffd00a4000| ldub [%o1 + %g0], %o0 {force-resync} {retired}
159 <microArch.cpp:365> {390000}- Timestamp: 2011-Jul-05 10:18:55
160 <cycle.cpp:1174> {390921}- Forced Resync:#519322[00] @v:00131b898
|ffffffffe4742000| stx %l2, [%l0 + 0] {force-resync} {retired}
161 <accounting.cpp:128> {390921}- Unknown resync for instruction code:
SideEffectStore
162 <cycle.cpp:1174> {392273}- Forced Resync:#520290[00] @v:001049054
|ffffffffd00a4000| ldub [%o1 + %g0], %o0 {force-resync} {retired}
163 <cycle.cpp:1174> {392392}- Forced Resync:#520437[00] @v:00131ebdc
|fffffffff6772000| stx %i3, [%i4 + 0] {force-resync} {retired}
164 <accounting.cpp:128> {392392}- Unknown resync for instruction code:
SideEffectStore
165 <cycle.cpp:1174> {392639}- Forced Resync:#520576[00] @v:00100b068
|ffffffff99458000| rd %softint, %o4 {force-resync}RDPRUnsupported
166 <flexus.cpp:272> {400000}- Timestamp: 2011-Jul-05 10:18:58
167 <microArch.cpp:365> {400000}- Timestamp: 2011-Jul-05 10:18:58
168 <cycle.cpp:1174> {404568}- Forced Resync:#531360[00] @v:001278a50
|ffffffffd4d808a0| ldxa [%g0 + %g0] 0x45, %o2 # ASI_DCUCR {force-resync}
{retired}
169 <cycle.cpp:1174> {404619}- Forced Resync:#531394[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
170 <accounting.cpp:128> {404619}- Unknown resync for instruction code:
SideEffectStore
171 <cycle.cpp:1174> {404628}- Forced Resync:#531414[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
172 <accounting.cpp:128> {404628}- Unknown resync for instruction code:
SideEffectStore
173 <cycle.cpp:1174> {404637}- Forced Resync:#531434[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
174 <accounting.cpp:128> {404637}- Unknown resync for instruction code:
SideEffectStore
175 <cycle.cpp:1174> {404646}- Forced Resync:#531454[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
176 <accounting.cpp:128> {404646}- Unknown resync for instruction code:
SideEffectStore
177 <cycle.cpp:1174> {404655}- Forced Resync:#531474[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
178 <accounting.cpp:128> {404655}- Unknown resync for instruction code:
SideEffectStore
179 <cycle.cpp:1174> {404664}- Forced Resync:#531494[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
180 <accounting.cpp:128> {404664}- Unknown resync for instruction code:
SideEffectStore
181 <cycle.cpp:1174> {404673}- Forced Resync:#531514[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
182 <accounting.cpp:128> {404673}- Unknown resync for instruction code:
SideEffectStore
183 <cycle.cpp:1174> {404682}- Forced Resync:#531534[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
184 <accounting.cpp:128> {404682}- Unknown resync for instruction code:
SideEffectStore
185 <cycle.cpp:1174> {404691}- Forced Resync:#531554[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
186 <accounting.cpp:128> {404691}- Unknown resync for instruction code:
SideEffectStore
187 <cycle.cpp:1174> {404700}- Forced Resync:#531574[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
188 <accounting.cpp:128> {404700}- Unknown resync for instruction code:
SideEffectStore
189 <cycle.cpp:1174> {404709}- Forced Resync:#531594[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
190 <accounting.cpp:128> {404709}- Unknown resync for instruction code:
SideEffectStore
191 <cycle.cpp:1174> {404718}- Forced Resync:#531614[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
192 <accounting.cpp:128> {404718}- Unknown resync for instruction code:
SideEffectStore
193 <cycle.cpp:1174> {404727}- Forced Resync:#531634[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
194 <accounting.cpp:128> {404727}- Unknown resync for instruction code:
SideEffectStore
195 <cycle.cpp:1174> {404736}- Forced Resync:#531654[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
196 <accounting.cpp:128> {404736}- Unknown resync for instruction code:
SideEffectStore
197 <cycle.cpp:1174> {404745}- Forced Resync:#531674[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
198 <accounting.cpp:128> {404745}- Unknown resync for instruction code:
SideEffectStore
199 <cycle.cpp:1174> {404754}- Forced Resync:#531694[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
200 <accounting.cpp:128> {404754}- Unknown resync for instruction code:
SideEffectStore
201 <cycle.cpp:1174> {404763}- Forced Resync:#531714[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
202 <accounting.cpp:128> {404763}- Unknown resync for instruction code:
SideEffectStore
203 <cycle.cpp:1174> {404772}- Forced Resync:#531734[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
204 <accounting.cpp:128> {404772}- Unknown resync for instruction code:
SideEffectStore
205 <cycle.cpp:1174> {404781}- Forced Resync:#531754[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
206 <accounting.cpp:128> {404781}- Unknown resync for instruction code:
SideEffectStore
207 <cycle.cpp:1174> {404790}- Forced Resync:#531774[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
208 <accounting.cpp:128> {404790}- Unknown resync for instruction code:
SideEffectStore
209 <cycle.cpp:1174> {404799}- Forced Resync:#531794[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
210 <accounting.cpp:128> {404799}- Unknown resync for instruction code:
SideEffectStore
211 <cycle.cpp:1174> {404808}- Forced Resync:#531814[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
212 <accounting.cpp:128> {404808}- Unknown resync for instruction code:
SideEffectStore
213 <cycle.cpp:1174> {404817}- Forced Resync:#531834[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
214 <accounting.cpp:128> {404817}- Unknown resync for instruction code:
SideEffectStore
215 <cycle.cpp:1174> {404826}- Forced Resync:#531854[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
216 <accounting.cpp:128> {404826}- Unknown resync for instruction code:
SideEffectStore
217 <cycle.cpp:1174> {404835}- Forced Resync:#531874[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
218 <accounting.cpp:128> {404835}- Unknown resync for instruction code:
SideEffectStore
219 <cycle.cpp:1174> {404844}- Forced Resync:#531894[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
220 <accounting.cpp:128> {404844}- Unknown resync for instruction code:
SideEffectStore
221 <cycle.cpp:1174> {404853}- Forced Resync:#531914[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
222 <accounting.cpp:128> {404853}- Unknown resync for instruction code:
SideEffectStore
223 <cycle.cpp:1174> {404862}- Forced Resync:#531934[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
224 <accounting.cpp:128> {404862}- Unknown resync for instruction code:
SideEffectStore
225 <cycle.cpp:1174> {404871}- Forced Resync:#531954[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
226 <accounting.cpp:128> {404871}- Unknown resync for instruction code:
SideEffectStore
227 <cycle.cpp:1174> {404880}- Forced Resync:#531974[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
228 <accounting.cpp:128> {404880}- Unknown resync for instruction code:
SideEffectStore
229 <cycle.cpp:1174> {404889}- Forced Resync:#531994[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
230 <accounting.cpp:128> {404889}- Unknown resync for instruction code:
SideEffectStore
231 <cycle.cpp:1174> {404898}- Forced Resync:#532014[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
232 <accounting.cpp:128> {404898}- Unknown resync for instruction code:
SideEffectStore
233 <cycle.cpp:1174> {404907}- Forced Resync:#532034[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
234 <accounting.cpp:128> {404907}- Unknown resync for instruction code:
SideEffectStore
235 <cycle.cpp:1174> {404916}- Forced Resync:#532054[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
236 <accounting.cpp:128> {404916}- Unknown resync for instruction code:
SideEffectStore
237 <cycle.cpp:1174> {404925}- Forced Resync:#532074[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
238 <accounting.cpp:128> {404925}- Unknown resync for instruction code:
SideEffectStore
239 <cycle.cpp:1174> {404934}- Forced Resync:#532094[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
240 <accounting.cpp:128> {404934}- Unknown resync for instruction code:
SideEffectStore
241 <cycle.cpp:1174> {404943}- Forced Resync:#532114[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
242 <accounting.cpp:128> {404943}- Unknown resync for instruction code:
SideEffectStore
243 <cycle.cpp:1174> {404952}- Forced Resync:#532134[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
244 <accounting.cpp:128> {404952}- Unknown resync for instruction code:
SideEffectStore
245 <cycle.cpp:1174> {404961}- Forced Resync:#532154[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
246 <accounting.cpp:128> {404961}- Unknown resync for instruction code:
SideEffectStore
247 <cycle.cpp:1174> {404970}- Forced Resync:#532174[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
248 <accounting.cpp:128> {404970}- Unknown resync for instruction code:
SideEffectStore
249 <cycle.cpp:1174> {404979}- Forced Resync:#532194[00] @v:001278abc
|ffffffffc0f2084c| stxa %g0, [%o0 + %o4] 0x42 # ASI_DCACHE_INVALIDATE
{force-resync} {retired}
How can I fix them?
// Naderan *Mahmood;
