Any pdp-8 experts here? I've been fighting a problem with tss/8 for a bit. I've been working on getting it to build from sources. When I build for the pdp-8/e it seems to work correctly using simh. When I build for the the pdp-8/i I have problems.
My goal is a clean build from sources for the 8/i. But the KW8/I clock emulation in simh is (to my mind) suspect. I'm happy to go dig in the docs and look at the schematics, but I thought I'd ask here also. In the TSS/8 sources they do this for the 8/I: 244 IFZERO CPU < 245 /KW8I REAL TIME CLOCK 246 247 6137 CECI=6137 /CLEAR AND ENABLE CLOCK AND INTERRUPT 248 6133 CSCF=6133 /SKIP AND CLEAR FLAG IF FLAG Naturally, for the 8/e they say: 256 IFZERO CPU-2 < 257 CECI=6131 /CLOCK ENABLE 258 CSCF=6133 /SKIP AND CLEAR FLAG IF FLAG When I build for the 8/I I don't get clock interrupts the way I expect. Looking at the clock code in simh 6137 won't enable lock interrupts. 6133 will skip and clear. When I build for the 8/e I got clock interrrupts. Ages ago I wrote KW8/I verilog code from the specs I could find and it does interpret 6137 as CECI and does enable clock interrupts. Anyone have an opinion? it may be that competing clock hardware (i.e. 8/i, 8/e, 8/a) have different ideas about 6137... -brad _______________________________________________ Simh mailing list [email protected] http://mailman.trailing-edge.com/mailman/listinfo/simh
