It would depend on how you got there.
If the system was wired to go directly to the boot ROM on powerup (mode
2, I believe), the microcode would set PS = 340. However, if you entered
microODT and then jumped to the boot ROM via 173000G, the microcode
would set PS = 0. Note that the SimH PDP11 doesn't simulate the boot
ROMs; it uses workalikes.
Nonetheless, the clock shouldn't interrupt... provided that the system
had a real clock card, with an interrupt disable. If it was an original
11/23 with the half height card, then the line clock (BEVENT L) had no
interrupt disable, just like on the LSI11/2. So a clock interrupt was
certainly possible if the bootstrap was started manually.
Tim Litt pointed out that I could add a switch for starting boot code
with PS = 0, but I can't see a use case that makes sense.
/Bob
On 10/21/2013 10:49 AM, Alan Frisbie wrote:
2. boot routines should jam PS = 340, which is what is expected today.
#2 is based on an examination of the official boot ROM listings. While
there may be paths through the boot ROMs that don't set PS = 340, the
primary path does that, and it is known to work with all the existing
boot ROMs in the simulator.
My memory is far from perfect, but I recall a problem with
the DEQNA boot ROM (internal to the DEQNA, not external ROM)
in which it did not set PS=340. As I recall, it loaded and
then executed code in low memory (the vector area). If a
clock tick occured before the boot code finished, it would
dispatch to somewhere out in the weeds.
This was from a project I did in 1982, so my memory of the
details may be faulty. As I recall, we were using an LSI-11/23.
If necessary, I can search for my notes on that project.
Alan Frisbie
--
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-- Alan E. Frisbie [email protected]
-- Flying Disk Systems, Inc.
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