> On Dec 23, 2015, at 4:30 PM, Bob Supnik <[email protected]> wrote:
>
> There's nothing conditional about the user documentation. The 1965 reference
> manual says, "MARS (Memory Address Register Storage) Check Light. This light
> is turned on when a digit in MARS has a parity error or an invalid address.
> These errors halt the machine immediately."
>
> Now the key question is, what's an invalid address? Earlier, the user
> documentation talks about detecting an address that's too large (high order
> digit). But an invalid bit combination? Here's what the Customer Engineering
> Manual has to say: "Near the end of each memory cycle, MAR is checked for
> invalid digits in the ten-thousands position and for odd parity in each of
> the five positions." Nothing about checking for invalid bit combinations.
>
> So it appears to me that the simulator's definition of "valid" (or invalid)
> addresses is too strict. Invalid bit combinations are not checked explicitly.
>
> Then the question becomes, what does the 1620 actually do with an invalid bit
> combination (with valid parity) in MAR? I can't understand the core memory
> matrix selection logic in the CE Manual well enough to figure that out. The
> decode process is supposed to yield exactly one of 10 select wires for each
> digit position. For invalid bits, does it still yield just one? More than
> one? None?
I would have guessed that a 4 to 10 BCD decoder would not bother with the 8 bit
when decoding for lines 2-7, i.e., you'd get the n = 2..7 line if the input is
n mod 8. Judging by the CE Manual on bitsavers (227-5500-2), page 20, that's
almost true. It shows that the decoders for 3 through 7 are 3 input decoders,
they don't use the 8 bit. The decoder for 2 does use the 8 bit, interestingly
enough.
So the answer would be: memory address digit pattern 1010 doesn't decode
anything but patterns 1011 through 1111 decode as if they were 0011 through
0111.
paul
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