Regarding Mark Lind's post:
It's a simple detective problem. Where does an 11/23 differ from an 11/23+?
If you look in pdp11_defs.h, F-11 based systems are grouped together,
and CPUT_F is used in most feature definitions.
#define CPUT_F (CPUT_23|CPUT_23P|CPUT_24) /* all F11's */
There is only ONE place where an 11/23+ is called out as something other
than a generic F-11 CPU:
#define HAS_LTCR (CPUT_04|CPUT_05|CPUT_20|CPUT_23P|CPUT_24| \
CPUT_34|CPUT_40|CPUT_44|CPUT_45|CPUT_60| \
CPUT_70|CPUT_J)
That is, the 11/23+ and 11/24 have a line time clock register. The 11/23
DOES NOT.
When the TST @#172540 occurs, the PSW is set to 350 (IPL 6), locking out
any clock interrupts. The interrupt vector for NXM, however, sets the
PSW to 0. That means any pending line-time clock interrupt will occur
immediately.
On an 11/23+, the line time clock register initializes to interrupts
disabled. On the 11/23, though, there IS NO line time clock register,
and a clock interrupt is pending. As soon as the NXM trap completes, an
interrupt occurs through vector 100, which is set up as follows:
100/ 102
102/ 0
So the PC is set to 102, which is a HALT instruction, and the simulator
halts, with the PC pointing at the next instruction.
Everything is behaving as it should. This version of XXDP was not
designed to run on an 11/23, and it runs on an 11/23+ by coincidence.
Moral: don't run software on hardware models that it doesn't support.
And compress your disk images before posting them.
/Bob Supnik
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