Den 2016-03-12 kl. 20:50, skrev Paul Koning:
On Mar 12, 2016, at 12:25 PM, Anders Magnusson <[email protected]> wrote:
Den 2016-03-12 kl. 17:45, skrev Clem Cole:
FYI: CDC and Cray's often used HyperChannel adapters; but I suspect have long
lost the info on it (very funky SW interface). Plus I doubt I still have the
code we developed for it (the HyperChannel was the other side of the Tektronix
TCP/IP for VMS implementation we did in the late 1970's). My memory is that we
dedicated a PP to talking to NOS, so there was very little OS code. We
spliced it into the RJE system and never did much beyond FTP services for it;
when I worked on it. I still talk with the guy that did the the PP work for
NOS (Stan Smith whom I will ask). The Cray port was done by the NCAR guys
working with our CDC and VMS code; but that was after I was involved in the
work.
BTW: @ LCC we did some work with DG on their UNIX port; I somehow seem to
remember that the Eclipse family used the original AMD ethernet chip set on
their network adapter.
DG-UX or MV/UX?
The DG ethernet card has a 82586 on board. I have two of those cards, but
unfortunately no programming specs. Anyone that has?
I have a copy of the datasheet -- I can email it if you like (2.4 MB). It's
the chip used on the DEC Pro series DECNA Ethernet card. It's a truly horrible
design, with errors that were well known as things to avoid 15 years earlier.
In the DECNA, you program it directly -- the card is basically just a bus
bridge plus a small local memory for the chip to talk to. If the DG boards are
like that, the 82586 datasheet will serve. But if there's machinery in between
that exposes a different API, you'd need those specs instead, of course.
Also: I've seen a NetBSD driver for it, which may also help understand how that
chip works.
I am unfortunately too familiar with the 82586 :-/ Never been a fan of
the Intel network chips.
But I assume DG has abstracted the programming interface on this card
beyond recognition, at least based on the number of other chips on the card.
It seemed to be quite common to add another API to standard chips, the
DELUA for example has a LANCE chip but you do not program the LANCE
directly.
-- Ragge
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