Hi Mark, > On Sunday, January 29, 2017 at 4:43 PM, Richard Cornwell wrote: > > > On Sunday, January 29, 2017 at 12:50 PM, Richard Cornwell wrote: > > > > How is single stepping implemented from the point of view of > > > > the simulator? > > > > > > Well, as long as you're managing decrements to sim_interval to > > > reflect instructions executed, and you call sim_process_event > > > when the sim_interval value is <= 0 and return from sim_instr() > > > when sim_process_event () returns anything else but SCPE_OK, then > > > it just works. > > > > > > Under the covers SCP has a fake unit which it schedules for the > > > specified STEP count (default of 1) when you enter a STEP command > > > at the sim> prompt. That unit's service routine then gets > > > dispatched to when the step count expires and it does nothing but > > > return SCPE_STEP which should cause your above mentioned > > > sim_process_event loop to return from sim_instr(). > > > > > > Make sense? > > > > That is what I thought. Now sim_interval for me counts memory > > cycles, since instructions are variable length. However I have > > noticed that "step" by itself does not always execute one > > instruction. I wonder if maybe we should look at how single > > stepping is implemented and perhaps pass an argument to sim_instr() > > to indicate that a number of steps is desired. One of the issues is > > that on machines like the KA10 and I7090 interrupts execute an > > instruction out of sequence. Not sure if that should be counted as > > a step or not. > > Well, if you want that behavior you can decrement sim_interval and > \call sim_process_event and exit sim_inst() wherever you do that > (being careful that everything is restartable from the point you > exit). Or reconsider the concept of having sim_interval track memory > cycles instead of instructions.... What is the real value of keeping > track of memory cycles?
I track memory cycles so that I/O is closer to the time that the CPU expects. This is more important for the I7000 series since instructions where executed during I/O and some of the code relies on how many instructions can be executed during a read/write. Also for some cases during the I7090 I decrement sim_interval during long instructions to closer simulate the real speed of the machine. When sim_inst() exits it is totally restartable. This discussion might also apply to the Front Panel stuff and to throttling, to simulate closer to real machine speed. Rich -- ========================================================================== Richard Cornwell [email protected] http://sky-visions.com LinkedIn: https://www.linkedin.com/in/richard-cornwell-991076107 ========================================================================== _______________________________________________ Simh mailing list [email protected] http://mailman.trailing-edge.com/mailman/listinfo/simh
