Hi folks!
Seems I have found a bug in the PDP-11 emulating the
MUL instruction.
The current code takes the specified register as source
instead of the register pair R and R+1 if the register is even.
The DIV instruction is also invalid, but the other way around:
if R is odd, R is duplicated into the high half of the 32 bit int.
The attached patch will correct the problems.
Hope that helps
Ludwig Tauer
diff --git a/PDP11/pdp11_cpu.c b/PDP11/pdp11_cpu.c
index 06f12e2c..c3f00703 100644
--- a/PDP11/pdp11_cpu.c
+++ b/PDP11/pdp11_cpu.c
@@ -1684,7 +1684,9 @@ while (reason == 0) {
break;
}
src2 = dstreg? R[dstspec]: ReadW (GeteaW (dstspec));
- src = R[srcspec];
+ src = (srcspec & 1)
+ ? R[srcspec]
+ :(((uint32) R[srcspec]) << 16) | R[srcspec | 1];
if (GET_SIGN_W (src2))
src2 = src2 | ~077777;
if (GET_SIGN_W (src))
@@ -1708,7 +1710,9 @@ while (reason == 0) {
break;
}
src2 = dstreg? R[dstspec]: ReadW (GeteaW (dstspec));
- src = (((uint32) R[srcspec]) << 16) | R[srcspec | 1];
+ src = (srcspec & 1)
+ ? R[srcspec]
+ :(((uint32) R[srcspec]) << 16) | R[srcspec | 1];
if (src2 == 0) {
N = 0; /* J11,11/70 compat */
Z = V = C = 1; /* N = 0, Z = 1 */
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