Ouch! You're right (of course).
I just assumed that NVAX actually implemented the full address space
defined by the changed page table, but it only do 32 bits, and actually
seem to ignore the two high bits of the PFN in the PTE.
I don't think I have never looked at this enough before to see that detail.
Oh well. I stand (very) corrected.
By the way. was there any Qbus system that used NVAX? Otherwise I'm not
sure what the Qbus reference were about. Or was it just the comment
about that the NVAX could also run with the old format for PTEs?
Johnny
On 2019-04-21 20:58, Bob Supnik wrote:
If you're talking about the NVAX chip and its derivative systems,
including the 6600 and 7000, the answer is, no, it doesn't support a 34b
physical address space. NVAX has a 32b physical address space. Despite a
25b page frame number (PFNs) in the PTE, the translation buffer has only
23b for the PFN = 4GB physical address space (see the KA680 Technical
Manual).
The preferred mode of physical addressing was 32b one-to-one, but a mode
switch allowed for 30b with sign extension. The Qbus systems, for
backward compatibility, used 30b with sign extensions and limited the
physical address space to 1GB (512MB memory, 512MB IO), like in the
earlier VAX chips.
While NVAX+ was interface compatible with EV4, for interchangeability in
the 7000, the guts were the same as NVAX, with a 23b PFN.
/Bob
On 4/21/2019 12:00 PM, simh-requ...@trailing-edge.com wrote:
Message: 5
Date: Sun, 21 Apr 2019 17:04:32 +0200
From: Johnny Billquist<b...@softjar.se>
To:simh@trailing-edge.com
Subject: Re: [Simh] More VAX Simulators
Message-ID:<1e40709f-d44c-bb20-4d75-b9442fa38...@softjar.se>
Content-Type: text/plain; charset=utf-8; format=flowed
On 2019-04-21 16:13, Timothy Stark wrote:
Wow! I try that new simh emulator soon.
Definitely sounds interesting, yes...
Have you try implementing VAX 3100 M96/M98, VAX 4000 M106/M108, and VAX
4000 M90 yet?
How about VAX 66x0 that provides full 32-bit addressing for up to 3.5 GB
main memory?
You know that technically, it supports 34-bit physical addresses, right?
However, I'm not sure DEC ever built any VAX model capable of using it,
nor do I know if VMS supports it.
Virtual address space would still be 32 bits, of course.
And as far as I know, only NVAX supported the 34-bit physical address
space, and it does require changing some registers before the MMU page
address registers go to 25 bits. But it might be that you also need to
go to that mode in order to use 3.5G of physical memory. I can't
remember for sure...
The 66x0 machine I'm pretty sure didn't allow for more than 32-bit
physical addresses. But I'm wondering about the 7000 models...
Not sure if you could even go to 3.5G on the 66x0 machines. The CPU can
do it, but I wonder about the bus structure.
Johnny
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--
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: b...@softjar.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
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