Instruction timing as such is not relevant. Different implementations had very different timings, not to mention that speed of memory also makes a difference.

Devices basically do not have a strict timing either, but yes, there is plenty of software that assumes that an interrupt does not happen before a single instruction have been executed after the previous interrupt, from the same device, for example. On real hardware that was just an absurd case that lots of code never considered, since it wasn't really physically possible for it to happen.

The throttling in simh is because some people want the emulation to somewhat mimic the real thing. For some people, that experience of slowness is desirable.

  Johnny

On 2020-07-20 23:10, Paul Moore wrote:
(I am writing my own emulator just because I have never done that before, and the PDP 11 is such a pivotal system in the history of modern computing it seemed worth learning about, and what better way to learn than to emulate it )

So how important is timing of instruction execution and device response?

The PDP 11 docs go  to great length giving instruction timing. But the fact that there is a % throttle in simh suggest that’s not important. I assume that turning that throttle up and down makes the emulated CPU go faster and slower. I have seen code using simple counters as delays but I assume that if you want precision you use the Kw11.

With regards device responses I have found that going ’too fast’ upsets code. If they do something that triggers an interrupt (set ‘go’ for example) and the interrupt arrives too soon (like before the next instruction) they get surprised and can misbehave (you could argue that’s a bug, but that’s irrelevant). So always wait a few beats. But  I assume there is no reason to try to precisely emulate the timing of , say, a disk drive. (The early handbooks state how awesome the async nature of the IO subsystem is cos you can swap out old for new and things just go faster).


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Johnny Billquist                  || "I'm on a bus
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