Joel,
Attached is a patch that fixes gets the SPI example
to work.
There were two problems:
1) The HWSpi was adding itself to the cycle list
inappropriately.
2) The SpiSink class, which is used to decode the
output of the SPI device, was not working, possibly
due to an architectural change in simulavrxx at
some point.
The example should now work as advertised.
--
Michael N. Moran (h) 770 516 7918
5009 Old Field Ct. (c) 678 521 5460
Kennesaw, GA, USA 30144 http://mnmoran.org
"So often times it happens, that we live our lives in chains
and we never even know we have the key."
"Already Gone" by Jack Tempchin (recorded by The Eagles)
The Beatles were wrong: 1 & 1 & 1 is 1
? .pin.cpp.swp
? spifix.patch
Index: hwspi.cpp
===================================================================
RCS file: /sources/simulavr/simulavrxx/src/hwspi.cpp,v
retrieving revision 1.8
diff -a -u -r1.8 hwspi.cpp
--- hwspi.cpp 26 Mar 2009 18:04:37 -0000 1.8
+++ hwspi.cpp 17 May 2009 12:15:36 -0000
@@ -97,9 +97,7 @@
{
if (spcr & SPE)
{
- core->AddToCycleList(this);
} else {
- core->RemoveFromCycleList(this);
}
}
@@ -386,7 +384,7 @@
HWSpi::HWSpi( AvrDevice *_c, HWIrqSystem *is, PinAtPort mo, PinAtPort mi, PinAtPort sc, PinAtPort s, unsigned int vfs):
Hardware(_c), core(_c), irqSystem(is), pinMosi(mo), pinMiso(mi), pinSck(sc), pinSs(s), vectorForSpif(vfs)
{
- //core->AddToCycleList(this);
+ core->AddToCycleList(this);
//irqSystem->RegisterIrqPartner(this, vfs); //we are assigned for handling irq's with vector no vfs here!
Reset();
}
@@ -484,7 +482,7 @@
HWMegaSpi::HWMegaSpi( AvrDevice *core, HWIrqSystem *is, PinAtPort mo, PinAtPort mi, PinAtPort sc, PinAtPort s, unsigned int vfs):
HWSpi( core, is, mo, mi, sc, s, vfs)
{
- core->AddToCycleList(this);
+// core->AddToCycleList(this);
//irqSystem->RegisterIrqPartner(this, vfs); //we are assigned for handling irq's with vector no vfs here!
Reset();
}
Index: spisink.cpp
===================================================================
RCS file: /sources/simulavr/simulavrxx/src/spisink.cpp,v
retrieving revision 1.1
diff -a -u -r1.1 spisink.cpp
--- spisink.cpp 23 Mar 2009 20:36:30 -0000 1.1
+++ spisink.cpp 17 May 2009 12:15:36 -0000
@@ -1,15 +1,25 @@
#include <iostream>
#include "spisink.h"
+enum {
+ SSBIT = 0,
+ SCLKBIT = 1,
+ MISOBIT = 2
+ };
+
SpiSink::SpiSink( Net& ssNet,
Net& sclkNet,
Net& misoNet,
bool clockIsIdleHigh,
bool clockSampleOnLeadingEdge
) throw():
- _ss(),
- _sclk(),
- _miso(),
+ _port(0),
+ _ss( &_port, (unsigned char)(1<<SSBIT) ),
+ _sclk( &_port, (unsigned char)(1<<SCLKBIT) ),
+ _miso( &_port, (unsigned char)(1<<MISOBIT) ),
+ _ssState(false),
+ _sclkState(false),
+ _misoState(false),
_state(0),
_sr(0),
_clockIsIdleHigh(clockIsIdleHigh),
@@ -31,29 +41,33 @@
*timeToNextStepIn_ns = 1000; // Once every microsecond
bool sample = false;
- if(!_ss){
- if(_prevClkState != (bool)_sclk){
- _prevClkState = (bool)_sclk;
+ _ssState = (_port & (1<<SSBIT))?true:false;
+ _sclkState = (_port & (1<<SCLKBIT))?true:false;
+ _misoState = (_port & (1<<MISOBIT))?true:false;
+
+ if(!_ssState){
+ if(_prevClkState != _sclkState){
+ _prevClkState = _sclkState;
if(_clockIsIdleHigh){
// Clock is HIGH when idle
if(_clockSampleOnLeadingEdge){
// Sample on leading edge
- sample = ((bool)_sclk)?false:true;
+ sample = (_sclkState)?false:true;
}
else {
// Sample on trailing edge
- sample = ((bool)_sclk)?true:false;
+ sample = (_sclkState)?true:false;
}
}
else {
// Clock is LOW when idle
if(_clockSampleOnLeadingEdge){
// Sample on leading edge
- sample = ((bool)_sclk)?true:false;
+ sample = (_sclkState)?true:false;
}
else {
// Sample on trailing edge
- sample = ((bool)_sclk)?false:true;
+ sample = (_sclkState)?false:true;
}
}
}
@@ -66,7 +80,7 @@
for(;;){
switch(_state){
case 0: // Waiting for /SS
- if(!_ss){
+ if(!_ssState){
_state = 1;
continue;
}
@@ -80,7 +94,7 @@
case 7: // Seventh sample
if(sample){
_sr <<= 1;
- if(_miso){
+ if(_misoState){
_sr |= 0x01;
}
++_state;
@@ -89,7 +103,7 @@
case 8: // First sample
if(sample){
_sr <<= 1;
- if(_miso){
+ if(_misoState){
_sr |= 0x01;
}
_state = 1;
@@ -112,14 +126,14 @@
break;
}
- if((bool)_ss != _prevSS){
- if(_ss){
+ if(_ssState != _prevSS){
+ if(_ssState){
cout << "spisink: /SS negated" << endl;
}
else {
cout << "spisink: /SS asserted" << endl;
}
- _prevSS = _ss;
+ _prevSS = _ssState;
}
return 0;
Index: spisink.h
===================================================================
RCS file: /sources/simulavr/simulavrxx/src/spisink.h,v
retrieving revision 1.1
diff -a -u -r1.1 spisink.h
--- spisink.h 23 Mar 2009 20:36:30 -0000 1.1
+++ spisink.h 17 May 2009 12:15:36 -0000
@@ -6,9 +6,13 @@
// prints the results one byte at a time to stdout.
class SpiSink : public SimulationMember {
private:
+ unsigned char _port;
Pin _ss; // Output to AVR
Pin _sclk; // Output to AVR
Pin _miso; // Output to AVR
+ bool _ssState;
+ bool _sclkState;
+ bool _misoState;
unsigned _state;
unsigned char _sr;
bool _clockIsIdleHigh;
@@ -24,6 +28,7 @@
) throw();
private: // SimulationMember
int Step(bool &trueHwStep, SystemClockOffset *timeToNextStepIn_ns=0);
+
};
#endif
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