Hi,
Sorry for the late update.
I tried to add suport for adaptec 6805H following the linux pm8001 driver.
It seems to access mpi configuration table, BAR4(PMCS_REGSET_2 in pmcs
terms) should be used,
instead of BAR5(PMCS_REGSET_3) currently used in pmcs.
I made the corresponding change to pmcs, patch attached to the mail
message,
pmcs_setup() now works, but driver attach fails randomly in
pmcs_start_mpi(), pmcs_soft_reset() and pmcs_echo_test().
log:
May 20 22:12:22 2236 pmcs: [ID 638130 kern.info] INFO: pmcs0: pmcs_attach:
firmware event log files: /var/tmp/fwlog0-aap1.0, /var/tmp/fwlog0-iop.0
May 20 22:12:22 2236 pmcs: [ID 327844 kern.info] INFO: pmcs0:
pmcs_setup_intr_impl: nintrs = 16 for type: 4
May 20 22:12:22 2236 pmcs: [ID 950610 kern.info] INFO: pmcs0:
pmcs_setup_intr_impl: get_navail failed; type: 4 rc: 0 avail: 2 min: 4
May 20 22:12:22 2236 pmcs: [ID 327779 kern.info] INFO: pmcs0:
pmcs_setup_intr_impl: nintrs = 32 for type: 2
May 20 22:12:22 2236 pmcs: [ID 837865 kern.info] INFO: pmcs0:
pmcs_setup_intr_impl: navail = 2 for type: 2
May 20 22:12:22 2236 pcplusmp: [ID 805372 kern.info] pcplusmp:
pciex9005,8081 (pmcs) instance 0 irq 0x36 vector 0x42 ioapic 0xff intin
0xff is bound to cpu 5
May 20 22:12:22 2236 pmcs: [ID 816878 kern.info] INFO: pmcs0: 2 MSI
interrupts configured
May 20 22:12:22 2236 pmcs: [ID 199423 kern.info] INFO: pmcs0: pmcs_setup:
I/O queue depth set too high (512). Setting to 510
May 20 22:12:22 2236 pmcs: [ID 327312 kern.info] INFO: pmcs0: Chip
Revision: C; F/W Revision 1.14.7 Released (ILA rev 01110000)
May 20 22:12:23 2236 pmcs: [ID 579101 kern.info] INFO: pmcs0:
pmcs_start_mpi: MPI launch failed (GST 0x901b3 DBCLR 0x0)
May 20 22:12:23 2236 pmcs: [ID 778480 kern.info] INFO: pmcs0:
pmcs_soft_reset
May 20 22:12:24 2236 pmcs: [ID 799962 kern.info] INFO: pmcs0:
pmcs_echo_test: command timed out on echo test #0
May 20 22:12:24 2236 unix: [ID 836849 kern.notice]
May 20 22:12:24 2236 ^Mpanic[cpu5]/thread=ffffff02e1366880:
May 20 22:12:24 2236 genunix: [ID 498171 kern.notice] echo test
May 20 22:12:24 2236 unix: [ID 100000 kern.notice]
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb5b0
pmcs:pmcs_attach+156a ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb620
genunix:devi_attach+9e ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb660
genunix:attach_node+14f ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb6b0
genunix:i_ndi_config_node+c9 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb6e0
genunix:i_ddi_attachchild+88 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb720
genunix:devi_attach_node+88 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb7a0
genunix:config_immediate_children+e0 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb7f0
genunix:devi_config_common+d9 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb890
genunix:mt_config_thread+70 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb930
genunix:mt_config_children+19d ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb970
genunix:config_grand_children+34 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cb9c0
genunix:devi_config_common+ec ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cba60
genunix:mt_config_thread+70 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbb00
genunix:mt_config_children+19d ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbb40
genunix:config_grand_children+34 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbb90
genunix:devi_config_common+ec ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbbe0
genunix:ndi_devi_config_driver+76 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbc70
devinfo:di_ioctl+1e6 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbcb0
genunix:cdev_ioctl+39 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbd00
specfs:spec_ioctl+60 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbd90
genunix:fop_ioctl+55 ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbeb0
genunix:ioctl+9b ()
May 20 22:12:24 2236 genunix: [ID 655072 kern.notice] ffffff00102cbf00
unix:brand_sys_sysenter+2b7 ()
May 20 22:12:24 2236 unix: [ID 100000 kern.notice]
May 20 22:12:24 2236 genunix: [ID 672855 kern.notice] syncing file
systems...
May 20 22:12:24 2236 genunix: [ID 904073 kern.notice] done
# lspci -s 04:00.0 -vvv
04:00.0 Serial Attached SCSI controller: Adaptec PMC-Sierra PM8001 SAS HBA
[Series 6H] (rev 05)
Subsystem: Adaptec Device 0800
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 11
Region 0: Memory at fada0000 (64-bit, non-prefetchable)
Region 2: Memory at fad90000 (64-bit, non-prefetchable)
Region 4: Memory at fadb0000 (32-bit, non-prefetchable)
Region 5: Memory at fadc0000 (32-bit, non-prefetchable)
Expansion ROM at fae00000 [disabled]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA
PME(D0+,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s
<1us, L1 <8us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal-
Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr-
TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1,
Latency L0 <512ns, L1 <64us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain-
CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+
DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+,
LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-,
LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance-
SpeedDis-
Transmit Margin: Normal Operating Range,
EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB,
EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-,
LinkEqualizationRequest-
Capabilities: [ac] MSI-X: Enable- Count=16 Masked-
Vector table: BAR=0 offset=00002000
PBA: BAR=0 offset=00004000
# lspci -s 04:00.0 -nv
04:00.0 0107: 9005:8081 (rev 05)
Subsystem: 9005:0800
Flags: bus master, fast devsel, latency 0, IRQ 11
Memory at fada0000 (64-bit, non-prefetchable)
Memory at fad90000 (64-bit, non-prefetchable)
Memory at fadb0000 (32-bit, non-prefetchable)
Memory at fadc0000 (32-bit, non-prefetchable)
Expansion ROM at fae00000 [disabled]
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
Capabilities: [70] Express Endpoint, MSI 00
Capabilities: [ac] MSI-X: Enable- Count=16 Masked-
pci9005,800 (driver name: pmcs)
Hardware properties:
name='pci-msix-capid-pointer' type=int items=1
value=000000ac
name='pci-msi-capid-pointer' type=int items=1
value=00000050
name='assigned-addresses' type=int items=20
value=83040010.00000000.fada0000.00000000.00010000.83040018.00000000.fad90000.00000000.00010000.82040020.00000000.fadb0000.00000000.00010000.82040024.00000000.fadc0000.00000000.00040000
name='reg' type=int items=25
value=00040000.00000000.00000000.00000000.00000000.03040010.00000000.00000000.00000000.00010000.03040018.00000000.00000000.00000000.00010000.02040020.00000000.00000000.00000000.00010000.02040024.00000000.00000000.00000000.00040000
name='compatible' type=string items=13
value='pciex9005,8081.9005.800.5' +
'pciex9005,8081.9005.800' + 'pciex9005,8081.5' + 'pciex9005,8081' +
'pciexclass,010700' + 'pciexclass,0107' + 'pci9005,8081.9005.800.5' +
'pci9005,8081.9005.800' + 'pci9005,800' + 'pci9005,8081.5' + 'pci9005,8081'
+ 'pciclass,010700' + 'pciclass,0107'
name='model' type=string items=1
value='Serial Attached SCSI Controller'
name='power-consumption' type=int items=2
value=00000001.00000001
name='devsel-speed' type=int items=1
value=00000000
name='interrupts' type=int items=1
value=00000001
name='subsystem-vendor-id' type=int items=1
value=00009005
name='subsystem-id' type=int items=1
value=00000800
name='unit-address' type=string items=1
value='0'
name='class-code' type=int items=1
value=00010700
name='revision-id' type=int items=1
value=00000005
name='vendor-id' type=int items=1
value=00009005
name='device-id' type=int items=1
value=00008081
name='vendor-name' type=string items=1
value='Adaptec'
name='device-name' type=string items=1
Ideas are welcomed.
Thanks
On Tue, May 6, 2014 at 12:22 PM, Fred Liu <[email protected]> wrote:
>
> >From: Zhiwen Zheng [mailto:[email protected]]
> >Sent: 星期二, 五月 06, 2014 10:09
> >To: Keith Wesolowski
> >Cc: [email protected]; Fred Liu; Discussion list for
> OpenIndiana; Fred Liu; [email protected];
> [email protected]
> >Subject: Re: [developer] HBA recommended except LSI and ARECA
>
> >Hi,
> >I get an Adaptec card several days ago, the pci id changed, after add the
> new pci id, pmcs still can not attach.
> >I checked the linux pm8001 driver,
> >it seems to access some registers, pci bar 4 address need to be shifted.
> >I am out of door now, I think I can try to fix this several days later.
>
> "prtconf -D" has no info about pm8001. "prtconf -vvv" will get only
> following info:
>
> name='vendor-id' type=int items=1
> value=00009005
> name='device-id' type=int items=1
> value=00008081
> name='vendor-name' type=string items=1
> value='Adaptec'
> name='device-name' type=string items=1
> value='PMC-Sierra PM8001 SAS HBA [Series 6H]'
> name='subsystem-name' type=string items=1
> value='unknown subsystem'
>
> And yes, pmcs doen't attach.
>
diff --git a/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_attach.c
b/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_attach.c
index 18e4ecf..6652ae6 100644
--- a/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_attach.c
+++ b/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_attach.c
@@ -699,8 +699,9 @@ pmcs_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
ddi_soft_state_free(pmcs_softc_state, inst);
return (DDI_FAILURE);
}
+
pwp->mpibar =
- (((5U << 2) + 0x10) << PMCS_MSGU_MPI_BAR_SHIFT) | set3size;
+ (((4U << 2) + 0x10) << PMCS_MSGU_MPI_BAR_SHIFT) | set3size;
/*
* Make sure we can support this card.
@@ -949,6 +950,7 @@ pmcs_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
*/
if (pmcs_start_mpi(pwp)) {
if (pmcs_soft_reset(pwp, B_FALSE)) {
+ cmn_err(CE_PANIC, "start mpi");
goto failure;
}
pwp->last_reset_reason = PMCS_LAST_RST_ATTACH;
@@ -959,6 +961,7 @@ pmcs_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
* This tests interrupts and queues.
*/
if (pmcs_echo_test(pwp)) {
+ cmn_err(CE_PANIC, "echo test");
goto failure;
}
diff --git a/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_subr.c
b/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_subr.c
index fb5bb00..9dd4651 100644
--- a/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_subr.c
+++ b/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_subr.c
@@ -97,6 +97,8 @@ pmcs_setup(pmcs_hw_t *pwp)
uint32_t i, scratch, regbar, regoff, barbar, baroff;
uint32_t new_ioq_depth, ferr = 0;
+
+
/*
* Check current state. If we're not at READY state,
* we can't go further.
@@ -147,6 +149,18 @@ pmcs_setup(pmcs_hw_t *pwp)
return (-1);
}
pwp->mpi_offset = regoff;
+
+#if 0
+ ddi_put32(pwp->top_acc_handle,
+ &pwp->top_regs[PMCS_AXI_TRANS >> 2], 0x4f0000);
+ drv_usecwait(10);
+ if (ddi_get32(pwp->top_acc_handle,
+ &pwp->top_regs[PMCS_AXI_TRANS >> 2]) != 0x4f0000) {
+ pmcs_prt(pwp, PMCS_PRT_DEBUG, NULL, NULL,
+ "AXIL register update failed");
+ }
+#endif
+
if (pmcs_rd_mpi_tbl(pwp, PMCS_MPI_AS) != PMCS_SIGNATURE) {
pmcs_prt(pwp, PMCS_PRT_DEBUG, NULL, NULL,
"%s: Bad MPI Configuration Table Signature 0x%x", __func__,
@@ -403,6 +417,7 @@ pmcs_setup(pmcs_hw_t *pwp)
break;
}
+#if 0
/*
* If the open retry interval is non-zero, set it.
*/
@@ -417,6 +432,7 @@ pmcs_setup(pmcs_hw_t *pwp)
pwp->open_retry_interval);
}
}
+#endif
/*
* Enable Interrupt Reassertion
@@ -442,7 +458,7 @@ pmcs_start_mpi(pmcs_hw_t *pwp)
int i;
pmcs_wr_msgunit(pwp, PMCS_MSGU_IBDB, PMCS_MSGU_IBDB_MPIINI);
- for (i = 0; i < 1000; i++) {
+ for (i = 0; i < 2000; i++) {
if ((pmcs_rd_msgunit(pwp, PMCS_MSGU_IBDB) &
PMCS_MSGU_IBDB_MPIINI) == 0) {
break;
@@ -450,6 +466,8 @@ pmcs_start_mpi(pmcs_hw_t *pwp)
drv_usecwait(1000);
}
if (pmcs_rd_msgunit(pwp, PMCS_MSGU_IBDB) & PMCS_MSGU_IBDB_MPIINI) {
+ pmcs_prt(pwp, PMCS_PRT_DEBUG, NULL, NULL,
+ "%s: not zero", __func__);
return (-1);
}
drv_usecwait(500000);
@@ -6610,43 +6628,61 @@ pmcs_rd_msgunit(pmcs_hw_t *pwp, uint32_t off)
uint32_t
pmcs_rd_mpi_tbl(pmcs_hw_t *pwp, uint32_t off)
{
+#if 0
return (ddi_get32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_offset + off) >> 2]));
+#endif
+ return pmcs_rd_gsm_reg(pwp, 0, 0x4f0000 + pwp->mpi_offset + off);
}
uint32_t
pmcs_rd_gst_tbl(pmcs_hw_t *pwp, uint32_t off)
{
+#if 0
return (ddi_get32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_gst_offset + off) >> 2]));
+#endif
+ return pmcs_rd_gsm_reg(pwp, 0, 0x4f0000 + pwp->mpi_gst_offset + off);
}
uint32_t
pmcs_rd_iqc_tbl(pmcs_hw_t *pwp, uint32_t off)
{
+#if 0
return (ddi_get32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_iqc_offset + off) >> 2]));
+#endif
+ return pmcs_rd_gsm_reg(pwp, 0, 0x4f0000 + pwp->mpi_iqc_offset + off);
}
uint32_t
pmcs_rd_oqc_tbl(pmcs_hw_t *pwp, uint32_t off)
{
+#if 0
return (ddi_get32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_oqc_offset + off) >> 2]));
+#endif
+ return pmcs_rd_gsm_reg(pwp, 0, 0x4f0000 + pwp->mpi_oqc_offset + off);
}
uint32_t
pmcs_rd_iqpi(pmcs_hw_t *pwp, uint32_t qnum)
{
+#if 1
return (ddi_get32(pwp->mpi_acc_handle,
&pwp->mpi_regs[pwp->iqpi_offset[qnum] >> 2]));
+#endif
+ //return pmcs_rd_gsm_reg(pwp, 0, 0x4f0000 + pwp->iqpi_offset[qnum]);
}
uint32_t
pmcs_rd_oqci(pmcs_hw_t *pwp, uint32_t qnum)
{
+#if 1
return (ddi_get32(pwp->mpi_acc_handle,
&pwp->mpi_regs[pwp->oqci_offset[qnum] >> 2]));
+#endif
+ //return pmcs_rd_gsm_reg(pwp, 0, 0x4f0000 + pwp->oqci_offset[qnum]);
}
void
@@ -6658,29 +6694,41 @@ pmcs_wr_msgunit(pmcs_hw_t *pwp, uint32_t off, uint32_t
val)
void
pmcs_wr_mpi_tbl(pmcs_hw_t *pwp, uint32_t off, uint32_t val)
{
+#if 0
ddi_put32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_offset + off) >> 2], (val));
+#endif
+ pmcs_wr_gsm_reg(pwp, 0x4f0000 + pwp->mpi_offset + off, val);
}
void
pmcs_wr_gst_tbl(pmcs_hw_t *pwp, uint32_t off, uint32_t val)
{
+#if 0
ddi_put32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_gst_offset + off) >> 2], val);
+#endif
+ pmcs_wr_gsm_reg(pwp, 0x4f0000 + pwp->mpi_gst_offset + off, val);
}
void
pmcs_wr_iqc_tbl(pmcs_hw_t *pwp, uint32_t off, uint32_t val)
{
+#if 0
ddi_put32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_iqc_offset + off) >> 2], val);
+#endif
+ pmcs_wr_gsm_reg(pwp, 0x4f0000 + pwp->mpi_iqc_offset + off, val);
}
void
pmcs_wr_oqc_tbl(pmcs_hw_t *pwp, uint32_t off, uint32_t val)
{
+#if 0
ddi_put32(pwp->mpi_acc_handle,
&pwp->mpi_regs[(pwp->mpi_oqc_offset + off) >> 2], val);
+#endif
+ pmcs_wr_gsm_reg(pwp, 0x4f0000 + pwp->mpi_oqc_offset + off, val);
}
void
@@ -6697,15 +6745,21 @@ pmcs_wr_iqci(pmcs_hw_t *pwp, uint32_t qnum, uint32_t
val)
void
pmcs_wr_iqpi(pmcs_hw_t *pwp, uint32_t qnum, uint32_t val)
{
+#if 1
ddi_put32(pwp->mpi_acc_handle,
&pwp->mpi_regs[pwp->iqpi_offset[qnum] >> 2], val);
+#endif
+ //pmcs_wr_gsm_reg(pwp, 0x4f0000 + pwp->iqpi_offset[qnum], val);
}
void
pmcs_wr_oqci(pmcs_hw_t *pwp, uint32_t qnum, uint32_t val)
{
+#if 1
ddi_put32(pwp->mpi_acc_handle,
&pwp->mpi_regs[pwp->oqci_offset[qnum] >> 2], val);
+#endif
+ //pmcs_wr_gsm_reg(pwp, 0x4f0000 + pwp->oqci_offset[qnum], val);
}
void
diff --git a/usr/src/uts/common/sys/scsi/adapters/pmcs/pmcs_reg.h
b/usr/src/uts/common/sys/scsi/adapters/pmcs/pmcs_reg.h
index 800fbd8..a1947b6 100644
--- a/usr/src/uts/common/sys/scsi/adapters/pmcs/pmcs_reg.h
+++ b/usr/src/uts/common/sys/scsi/adapters/pmcs/pmcs_reg.h
@@ -221,7 +221,7 @@ extern "C" {
* GSM Share Memory, IO Status Table and Ring Buffer
*/
#define GSM_SM_BLKSZ 0x10000
-#define GSM_SM_BASE 0x400000
+#define GSM_SM_BASE 0x4f0000
#define IO_STATUS_TABLE_BASE 0x640000
#define RING_BUF_STORAGE_0 0x680000
#define RING_BUF_STORAGE_1 0x690000
diff --git a/usr/src/uts/intel/pmcs/Makefile b/usr/src/uts/intel/pmcs/Makefile
index 31500be..39e7bc1 100644
--- a/usr/src/uts/intel/pmcs/Makefile
+++ b/usr/src/uts/intel/pmcs/Makefile
@@ -74,7 +74,7 @@ CERRWARN += -_gcc=-Wno-uninitialized
CERRWARN += -_gcc=-Wno-unused-value
CERRWARN += -_gcc=-Wno-unused-label
CERRWARN += -_gcc=-Wno-parentheses
-
+CERRWARN += -_gcc=-Wno-unused-function
#
# Default build targets.
-------------------------------------------
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