P.B.Cheblakov wrote:
> It seems, I had found an incomprehensible code in IXXAT driver when I
> studied it.
>
> writeb(0x1, base_addr + CHANNEL_RESET_OFFSET);
> writeb(0x1, base_addr + CHANNEL_OFFSET + CHANNEL_RESET_OFFSET);
> udelay(100);
>
> board->dev[0] = ixxat_pci_add_chan(pdev, base_addr);
> if (IS_ERR(board->dev[0]))
> goto failure_iounmap;
>
> /* Check if second channel is available */
> if ((readb(base_addr + CHANNEL_OFFSET + REG_MOD) & 0xa1) == 0x21 &&
> readb(base_addr + CHANNEL_OFFSET + REG_SR) == 0x0c &&
> readb(base_addr + CHANNEL_OFFSET + REG_IR) == 0xe0) {
> board->dev[1] = ixxat_pci_add_chan(pdev,
> base_addr + CHANNEL_OFFSET);
> if (IS_ERR(board->dev[1]))
> goto failure_unreg_dev0;
>
> intcsr |= INTCSR_LINTI2;
> }
>
> As I understand, the IXXAT driver put the SJA1000 into Reset Mode and
> after that checks states of some registers with the assumption that the
> SJA1000 is in Basic Mode.
> And then it register_sja1000dev by calling ixxat_pci_add_chan. But
> registering sja1000dev cause switching the SJA1000 into PeliCAN Mode.
> I think this check wouldn't work if we unload and then load the IXXAT
> driver again because the SJA1000 is in PelicCAN Mode. Is it right?
> _______________________________________________
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>
Or, does
writeb(0x1, base_addr + CHANNEL_OFFSET + CHANNEL_RESET_OFFSET);
bring the SJA1000 into Basic Mode?
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