On 11/16/2010 01:14 PM, Tomoya MORINAGA wrote:
> Add flow control processing.
> Currently, there is no flow control processing.
> Thus, Add flow control processing as
> when there is no empty of tx buffer,
> netif_stop_queue is called.
> When there is empty buffer, netif_wake_queue is called.
>
>
> Fix endianness issue.
> there is endianness issue both Tx and Rx.
> Currently, data is set like below.
> Register:
> MSB---LSB
> x x D0 D1
> x x D2 D3
> x x D4 D5
> x x D6 D7
>
> But Data to be sent must be set like below.
> Register:
> MSB---LSB
> x x D1 D0
> x x D3 D2
> x x D5 D4
> x x D7 D6 (x means reserved area.)
>
>
> Separate interface register from whole of register structure.
> CAN register of Intel PCH EG20T has 2 sets of interface register.
> To reduce whole of code size, separate interface register.
> As a result, the number of function also can be reduced.
>
>
> Enumerate LEC macro from #define macro.
> For easy to readable, all LEC #define macros are replease to enums like below.
> enum pch_can_err {
> PCH_STUF_ERR = 1,
> PCH_FORM_ERR,
> PCH_ACK_ERR,
> PCH_BIT1_ERR,
> PCH_BIT0_ERR,
> PCH_CRC_ERR,
> PCH_LEC_ALL,
> };
>
>
> Move MSI processing to probe/remove processing.
> Currently, in case this driver is integrated as module, and
> when this module is re-installed, no interrupts is to be occurred.
> For the above issue, move MSI processing to open/release processing.
>
>
> Replace bit assignment value to BIT(X).
> For easy to readable, replace all bit assigned macros to BIT(X)
>
>
> Change Message Object index macro name.
> For easy to readable, add Message Object index like below.
> PCH_RX_OBJ_START
> PCH_RX_OBJ_END
> PCH_TX_OBJ_START
> PCH_TX_OBJ_END
>
>
> Add prefix PCH_ to all of #define macros.
> For easy to readable, add prefix "PCH_" to all of #define macros.
>
>
>
> Signed-off-by: Tomoya MORINAGA <[email protected]>
Acked-by: Wolfgang Grandegger <[email protected]>
Thanks for your contribution.
Wolfgang.
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